On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster. - Michael Rogenmoser; Nils Wistoff; Pirmin Vogel; Frank K. Gürkaynak; Luca Benini (ISVLSI, 2022)

WideVision: A Low-Power, Multi-Protocol Wireless Vision Platform for Distributed Surveillance. - Moritz Scherer 001; Fabian Sidler; Michael Rogenmoser; Michele Magno; Luca Benini (WiMob, 2022)

PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. - Vikram Jain; Matheus A. Cavalcante; Nazareno Bruschi; Michael Rogenmoser; Thomas Benz; Andreas Kurth; Davide Rossi; Luca Benini; Marian Verhelst (DAC, 2023)

PULP Fiction No More - Dependable PULP Systems for Space. - Markus Ulbricht 002; Yvan Tortorella; Michael Rogenmoser; Li Lu; Junchao Chen 001; Francesco Conti 001; Milos Krstic; Luca Benini (ETS, 2023)

Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm. - Michael Rogenmoser; Luca Benini (ICECS, 2023)

FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic. - Tim Fischer 001; Michael Rogenmoser; Matheus A. Cavalcante; Frank K. Gürkaynak; Luca Benini (CoRR, 2023)

FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic. - Tim Fischer 001; Michael Rogenmoser; Matheus A. Cavalcante; Frank K. Gürkaynak; Luca Benini (IEEE Des. Test, 2023)

SentryCore: A RISC-V Co-Processor System for Safe, Real-Time Control Applications. - Michael Rogenmoser; Alessandro Ottaviano; Thomas Benz; Robert Balas; Matteo Perotti; Angelo Garofalo; Luca Benini (CoRR, 2024)

Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC. - Michael Rogenmoser; Philip Wiese; Bruno E. Forlin; Frank K. Gürkaynak; Paolo Rech; Alessandra Menicucci; Marco Ottavi; Luca Benini (CoRR, 2024)

FlooNoC: A 645 Gbps/link 0.15 pJ/B/hop Open-Source NoC with Wide Physical Links and End-to-End AXI4 Parallel Multi-Stream Support. - Tim Fischer 001; Michael Rogenmoser; Thomas Benz; Frank K. Gürkaynak; Luca Benini (CoRR, 2024)

A High-Performance, Energy-Efficient Modular DMA Engine Architecture. - Thomas Benz; Michael Rogenmoser; Paul Scheffler; Samuel Riedel; Alessandro Ottaviano; Andreas Kurth; Torsten Hoefler; Luca Benini (IEEE Trans. Computers, 2024)

Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-core Computing Clusters for Reliable Processing in Space. - Michael Rogenmoser; Yvan Tortorella; Davide Rossi; Francesco Conti 001; Luca Benini (ACM Trans. Cyber Phys. Syst., 2025)

A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications. - Angelo Garofalo; Alessandro Ottaviano; Matteo Perotti; Thomas Benz; Yvan Tortorella; Robert Balas; Michael Rogenmoser; Chi Zhang; Luca Bertaccini; Nils Wistoff; Maicol Ciani; Cyril Koenig; et al. (CoRR, 2025)

FlooNoC: A 645-Gb/s/link 0.15-pJ/B/hop Open-Source NoC With Wide Physical Links and End-to-End AXI4 Parallel Multistream Support. - Tim Fischer 001; Michael Rogenmoser; Thomas Benz; Frank K. Gürkaynak; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2025)

relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication. - Michael Rogenmoser; Angelo Garofalo; Luca Benini (CoRR, 2025)