Comparison and Impact of Substrate Noise Generated by Clocked and Clockless Digital Circuitry. - Jim Le; Christopher Hanken; Martin Held; Michael S. Hagedorn; Kartikeya Mayaram; Terri S. Fiez (CICC, 2006)

Ultralow-Power Operation in Subthreshold Regimes Applying Clockless Logic. - Ryan D. Jorgenson; Lief Sorensen; Dan Leet; Michael S. Hagedorn; David R. Lamb; Thomas Hal Friddell; Warren P. Snapp (Proc. IEEE, 2010)

Experimental Characterization and Analysis of an Asynchronous Approach for Reduction of Substrate Noise in Digital Circuitry. - Jim Le; Christopher Hanken; Martin Held; Michael S. Hagedorn; Kartikeya Mayaram; Terri S. Fiez (IEEE Trans. Very Large Scale Integr. Syst., 2012)