Methoden zur automatischen Generierung von Simulationsmodellen für ASIC-Bibliotheken. - Michael Schaffner (Mainz, 1996)

A general-transformation EWA view rendering engine for 1080p video in 130 nm CMOS. - Pierre Greisen; Richard Emler; Michael Schaffner; Simon Heinzle; Frank K. Gürkaynak (VLSI-SoC, 2012)

Spatially-Varying Image Warping: Evaluations and VLSI Implementations. - Pierre Greisen; Michael Schaffner; Danny Luu; Val Mikos; Simon Heinzle; Frank K. Gürkaynak; Aljoscha Smolic (VLSI-SoC (Selected Papers), 2012)

Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications. - Pierre Greisen; Michael Schaffner; Simon Heinzle; Marian Runo; Aljoscha Smolic; Andreas Burg 001; Hubert Kaeslin; Markus H. Gross (IEEE Trans. Circuits Syst. Video Technol., 2012)

MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping. - Michael Schaffner; Pierre Greisen; Simon Heinzle; Frank K. Gürkaynak; Hubert Kaeslin; Aljoscha Smolic (ESSCIRC, 2013)

Efficient image resampling for multiview displays. - Michael Schaffner; Pierre Greisen; Simon Heinzle; Aljoscha Smolic (ICASSP, 2013)

A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized. - Michael Schaffner; Pascal A. Hager; Lukas Cavigelli; Z. Fang; Pierre Greisen; Frank K. Gürkaynak; Aljoscha Smolic; Hubert Kaeslin; Luca Benini (VLSI-SoC (Selected Papers), 2013)

A real-time 720p feature extraction core based on Semantic Kernels Binarized. - Michael Schaffner; Pascal Hager; Lukas Cavigelli; Pierre Greisen; Frank K. Gürkaynak; Hubert Kaeslin (VLSI-SoC, 2013)

An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing. - Michael Schaffner; Frank K. Gürkaynak; Aljoscha Smolic; Hubert Kaeslin; Luca Benini (DAC, 2014)

DRAM or no-DRAM?: exploring linear solver architectures for image domain warping in 28 nm CMOS. - Michael Schaffner; Frank K. Gürkaynak; Aljoscha Smolic; Luca Benini (DATE, 2015)

Automatic multiview synthesis - Towards a mobile system on a chip. - Michael Schaffner; Frank K. Gürkaynak; Hubert Kaeslin; Luca Benini; Aljosa Smolic (VCIP, 2015)

Automatic multiview synthesis - Prototype demo. - Michael Schaffner; Frank K. Gürkaynak; Hubert Kaeslin; Luca Benini; Aljosa Smolic (VCIP, 2015)

Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. - Michael Schaffner; Michael Gautschi; Frank K. Gürkaynak; Luca Benini (ARITH, 2016)

High-efficiency logarithmic number unit design based on an improved cotransformation scheme. - Youri Popoff; Florian Scheidegger; Michael Schaffner; Michael Gautschi; Frank K. Gürkaynak; Luca Benini (DATE, 2016)

4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. - Michael Gautschi; Michael Schaffner; Frank K. Gürkaynak; Luca Benini (ISSCC, 2016)

Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW. - Michael Schaffner; Frank K. Gürkaynak; Pierre Greisen; Hubert Kaeslin; Luca Benini; Aljosa Smolic (IEEE Trans. Circuits Syst. Video Technol., 2016)

Impact of temporal subsampling on accuracy and performance in practical video classification. - Florian Scheidegger; Lukas Cavigelli; Michael Schaffner; A. Cristiano I. Malossi; Constantine Bekas; Luca Benini (EUSIPCO, 2017)

An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. - Michael Gautschi; Michael Schaffner; Frank K. Gürkaynak; Luca Benini (IEEE J. Solid State Circuits, 2017)

The transprecision computing paradigm: Concept, design, and applications. - A. Cristiano I. Malossi; Michael Schaffner; Anca Molnos; Luca Gammaitoni; Giuseppe Tagliavini; Andrew P. J. Emerson; Andrés Tomás; Dimitrios S. Nikolopoulos; Eric Flamand; Norbert Wehn (DATE, 2018)

Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS. - Manuel Eggimann; Christelle Gloor; Florian Scheidegger; Lukas Cavigelli; Michael Schaffner; Aljosa Smolic; Luca Benini (ISCAS, 2018)

An accurate system for optimal state estimation of a levitated nanoparticle. - Michael Jost 003; Michael Schaffner; Michele Magno; Matthias Korb; Luca Benini; René Reimann; Vijay Jain; Michael Gross; Andrei Militaru; Martin Frimmer; Lukás Novotný (SAS, 2018)

On the Feasibility of FPGA Acceleration of Molecular Dynamics Simulations. - Michael Schaffner; Luca Benini (CoRR, 2018)

NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI. - Fabian Schuiki; Michael Schaffner; Luca Benini (CoRR, 2018)

Design and Evaluation of a Low-Power Sensor Device for Induced Rockfall Experiments. - Andrin Caviezel; Michael Schaffner; Lukas Cavigelli; Pascal Niklaus; Yves Bühler; Perry Bartelt; Michele Magno; Luca Benini (IEEE Trans. Instrum. Meas., 2018)

Towards Edge-Aware Spatio-Temporal Filtering in Real-Time. - Michael Schaffner; Florian Scheidegger; Lukas Cavigelli; Hubert Kaeslin; Luca Benini; Aljosa Smolic (IEEE Trans. Image Process., 2018)

Energy-efficient VLSI architectures for real-time and 3D video processing. - Michael Schaffner (Hartung-Gorre Verlag, 2018)

NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI. - Fabian Schuiki; Michael Schaffner; Luca Benini (DATE, 2019)

NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI. - Fabian Schuiki; Michael Schaffner; Luca Benini (ISOCC, 2019)

Network-accelerated non-contiguous memory transfers. - Salvatore Di Girolamo; Konstantin Taranov; Andreas Kurth; Michael Schaffner; Timo Schneider; Jakub Beránek; Maciej Besta; Luca Benini; Duncan Roweth; Torsten Hoefler (SC, 2019)

Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI. - Matheus A. Cavalcante; Fabian Schuiki; Florian Zaruba; Michael Schaffner; Luca Benini (CoRR, 2019)

A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. - Fabian Schuiki; Michael Schaffner; Frank K. Gürkaynak; Luca Benini (IEEE Trans. Computers, 2019)

FPGA Implementation of a Kalman-Based Motion Estimator for Levitated Nanoparticles. - Jiawei Liao; Michael Jost 003; Michael Schaffner; Michele Magno; Matthias Korb; Luca Benini; Felix Tebbenjohanns; René Reimann; Vijay Jain; Michael Gross; Andrei Militaru; Martin Frimmer; et al. (IEEE Trans. Instrum. Meas., 2019)

BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research. - Jonathan Balkind; Katie Lim; Michael Schaffner; Fei Gao 016; Grigory Chirkov; Ang Li 011; Alexey Lavrov; Tri M. Nguyen 002; Yaosheng Fu; Florian Zaruba; Kunal Gulati; Luca Benini; et al. (ASPLOS, 2020)

XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. - Dionysios Diamantopoulos; Florian Scheidegger; Stefan Mach; Fabian Schuiki; Germain Haugou; Michael Schaffner; Frank K. Gürkaynak; Christoph Hagleitner; A. Cristiano I. Malossi; Luca Benini (COOL CHIPS, 2020)

Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI. - Matheus A. Cavalcante; Fabian Schuiki; Florian Zaruba; Michael Schaffner; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2020)

SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element. - Pascal Nasahl; Miguel Osorio; Pirmin Vogel; Michael Schaffner; Timothy Trippel; Dominic Rizzo; Stefan Mangard (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022)