Integrated Placement for Mixed Macro Cell and Standard Cell Designs. - Michael Upton; Khosrow Samii; Stephen Sugiyama (DAC, 1990)

A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus. - Tim J. Stanley; Michael Upton; Patrick Sherhart; Trevor N. Mudge; Richard B. Brown (MICRO, 1993)

Gallium-arsenide process evaluation based on a RISC microprocessor example. - Richard B. Brown; Michael Upton; Ajay Chandna; Thomas R. Huff; Trevor N. Mudge; Richard E. Oettel (IEEE J. Solid State Circuits, 1993)

Resource Allocation in a High Clock Rate Microprocessor. - Michael Upton; Thomas R. Huff; Trevor N. Mudge; Richard B. Brown (ASPLOS, 1994)

Architectural trade-offs in a latency-tolerant gallium arsenide microprocessor. - Michael Upton (1997)

A 0.18-μm CMOS IA-32 processor with a 4-GHz integer execution unit. - Glenn Hinton; Michael Upton; David J. Sager; Darrell Boggs; Douglas M. Carmean; Patrice Roussel; Terry I. Chappell; Thomas D. Fletcher; Mark S. Milshtein; Milo Sprague; Samie Samaan; Robert Murray (IEEE J. Solid State Circuits, 2001)

Continual flow pipelines. - Srikanth T. Srinivasan; Ravi Rajwar; Haitham Akkary; Amit Gandhi; Michael Upton (ASPLOS, 2004)

Continual Flow Pipelines: Achieving Resource-Efficient Latency Tolerance. - Srikanth T. Srinivasan; Ravi Rajwar; Haitham Akkary; Amit Gandhi; Michael Upton (IEEE Micro, 2004)

The Impact of Performance Asymmetry in Emerging Multicore Architectures. - Saisanthosh Balakrishnan; Ravi Rajwar; Michael Upton; Konrad K. Lai (ISCA, 2005)

The gem5 Simulator: Version 20.0+. - Jason Lowe-Power; Abdul Mutaal Ahmad; Ayaz Akram; Mohammad Alian; Rico Amslinger; Matteo Andreozzi; Adrià Armejach; Nils Asmussen; Srikant Bharadwaj; Gabe Black; Gedare Bloom; Bobby R. Bruce; et al. (CoRR, 2020)