A Networked Frame Buffer with Windows Management Support. - Michaela Blott; Hans Eberle (EUROMEDIA, 1998)

Starburst: Building next-generation internet devices. - Ronald L. Sharp; Michaela Blott; Michael J. Coss; Bruce K. Ellis; David L. Majette; Vinay Purohit (Bell Labs Tech. J., 2001)

Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems. - Paul Edward McKechnie; Michaela Blott; Wim Vanderbauwhede (FCCM, 2009)

Automated instrumentation of FPGA-based systems for system-level transaction monitoring. - Paul Edward McKechnie; Michaela Blott; Wim Vanderbauwhede (SoC, 2009)

Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring. - Paul Edward McKechnie; Michaela Blott; Wim Vanderbauwhede (LCTES, 2009)

Design of a flexible high-speed FPGA-based flow monitor for next generation networks. - John McGlone; Roger F. Woods; Alan Marshall 001; Michaela Blott (ICSAMOS, 2010)

A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT). - John W. Lockwood; Adwait Gupte; Nishit Mehta; Michaela Blott; Tom English; Kees A. Vissers (Hot Interconnects, 2012)

Architecture for an open source network tester. - Muhammad Shahbaz 001; Gianni Antichi; Yilong Geng; Noa Zilberman; G. Adam Covington; Marc Bruyere; Nick Feamster; Nick McKeown; Bob Felderman; Michaela Blott; Andrew W. Moore 002; Philippe Owezarski (ANCS, 2013)

A flexible hash table design for 10GBPS key-value stores on FPGAS. - Zsolt István; Gustavo Alonso; Michaela Blott; Kees A. Vissers (FPL, 2013)

Dataflow architectures for 10Gbps line-rate key-value-stores. - Michaela Blott; Kees A. Vissers (Hot Chips Symposium, 2013)

Achieving 10Gbps Line-rate Key-value Stores with FPGAs. - Michaela Blott; Kimon Karras; Ling Liu; Kees A. Vissers; Jeremia Bär; Zsolt István (HotCloud, 2013)

High-Level Synthesis Case Study: Implementation of a Memcached Server. - Kimon Karras; Michaela Blott; Kees A. Vissers (CoRR, 2014)

OSNT: open source network tester. - Gianni Antichi; Muhammad Shahbaz 001; Yilong Geng; Noa Zilberman; G. Adam Covington; Marc Bruyere; Nick McKeown; Nick Feamster; Bob Felderman; Michaela Blott; Andrew W. Moore 002; Philippe Owezarski (IEEE Netw., 2014)

Scalable 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware. - David Sidler; Gustavo Alonso; Michaela Blott; Kimon Karras; Kees A. Vissers; Raymond Carley (FCCM, 2015)

Scaling Out to a Single-Node 80Gbps Memcached Server with 40Terabytes of Memory. - Michaela Blott; Ling Liu; Kimon Karras; Kees A. Vissers (HotStorage, 2015)

A Hash Table for Line-Rate Data Processing. - Zsolt István; Gustavo Alonso; Michaela Blott; Kees A. Vissers (ACM Trans. Reconfigurable Technol. Syst., 2015)

Reconfigurable future for HPC. - Michaela Blott (HPCS, 2016)

On How to Improve FPGA-Based Systems Design Productivity via SDAccel. - Giulia Guidi; Enrico Reggiani; Lorenzo Di Tucci; Gianluca Durelli; Michaela Blott; Marco D. Santambrogio (IPDPS Workshops, 2016)

Towards exascale computing with heterogeneous architectures. - Kenneth O'Brien; Lorenzo Di Tucci; Gianluca Durelli; Michaela Blott (DATE, 2017)

Architectural optimizations for high performance and energy efficient Smith-Waterman implementation on FPGAs using OpenCL. - Lorenzo Di Tucci; Kenneth O'Brien; Michaela Blott; Marco D. Santambrogio (DATE, 2017)

FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. - Yaman Umuroglu; Nicholas J. Fraser; Giulio Gambardella; Michaela Blott; Philip Heng Wai Leong; Magnus Jahre; Kees A. Vissers (FPGA, 2017)

Scaling Binarized Neural Networks on Reconfigurable Logic. - Nicholas J. Fraser; Yaman Umuroglu; Giulio Gambardella; Michaela Blott; Philip Heng Wai Leong; Magnus Jahre; Kees A. Vissers (PARMA-DITAM@HiPEAC, 2017)

Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. - Michaela Blott; Thomas B. Preußer; Nicholas J. Fraser; Giulio Gambardella; Kenneth O'Brien; Yaman Umuroglu; Miriam Leeser (ICCD, 2017)

Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks. - Julian Faraone; Nicholas J. Fraser; Giulio Gambardella; Michaela Blott; Philip Heng Wai Leong (ICONIP (2), 2017)

Databases on Future Hardware (Dagstuhl Seminar 17101). - Gustavo Alonso; Michaela Blott; Jens Teubner (Dagstuhl Reports, 2017)

Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic. - Jiang Su; Nicholas J. Fraser; Giulio Gambardella; Michaela Blott; Gianluca Durelli; David B. Thomas; Philip Heng Wai Leong; Peter Y. K. Cheung (ARC, 2018)

SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks. - Julian Faraone; Nicholas J. Fraser; Michaela Blott; Philip H. W. Leong (CVPR, 2018)

Inference of quantized neural networks on heterogeneous all-programmable devices. - Thomas B. Preußer; Giulio Gambardella; Nicholas J. Fraser; Michaela Blott (DATE, 2018)

Customizing Low-Precision Deep Neural Networks for FPGAs. - Julian Faraone; Giulio Gambardella; Nicholas J. Fraser; Michaela Blott; Philip H. W. Leong; David Boland (FPL, 2018)

FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. - Vladimir Rybalkin; Alessandro Pappalardo; Muhammad Mohsin Ghaffar; Giulio Gambardella; Norbert Wehn; Michaela Blott (FPL, 2018)

Designing scalable FPGA architectures using high-level synthesis. - Johannes de Fine Licht; Michaela Blott; Torsten Hoefler (PPoPP, 2018)

FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. - Michaela Blott; Thomas B. Preußer; Nicholas J. Fraser; Giulio Gambardella; Kenneth O'Brien; Yaman Umuroglu (CoRR, 2018)

FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. - Michaela Blott; Thomas B. Preußer; Nicholas J. Fraser; Giulio Gambardella; Kenneth O'Brien; Yaman Umuroglu; Miriam Leeser; Kees A. Vissers (ACM Trans. Reconfigurable Technol. Syst., 2018)

Efficient Error-Tolerant Quantized Neural Network Accelerators. - Giulio Gambardella; Johannes Kappauf; Michaela Blott; Christoph Doehring; Martin Kumm; Peter Zipf; Kees A. Vissers (DFT, 2019)

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. - Yifan Yang; Qijing Huang 001; Bichen Wu; Tianjun Zhang; Liang Ma 003; Giulio Gambardella; Michaela Blott; Luciano Lavagno; Kees A. Vissers; John Wawrzynek; Kurt Keutzer (FPGA, 2019)

QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware. - Michaela Blott; Lisa Halder; Miriam Leeser; Linda Doyle (ACM J. Emerg. Technol. Comput. Syst., 2019)

High-Throughput DNN Inference with LogicNets. - Yaman Umuroglu; Yash Akhauri; Nicholas J. Fraser; Michaela Blott (FCCM, 2020)

Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach. - Michaela Blott; Johannes Kath; Lisa Halder; Yaman Umuroglu; Nicholas J. Fraser; Giulio Gambardella; Miriam Leeser; Linda Doyle (FPGA, 2020)

LPAC: A Low-Precision Accelerator for CNN on FPGAs. - Tianyu Zhang; Tiantian Han; Lu Tian; Yi Li; Xijie Jia; Guangdong Liu; Pingbo An; Yingran Tan; Lingzhi Sui; Shaoxia Fang; Dongliang Xie; Michaela Blott; et al. (FPGA, 2020)

LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications. - Yaman Umuroglu; Yash Akhauri; Nicholas James Fraser; Michaela Blott (FPL, 2020)

Evolutionary bin packing for memory-efficient dataflow inference acceleration on FPGA. - Mairin Kroes; Lucian Petrica; Sorin Cotofana; Michaela Blott (GECCO, 2020)

DarwiNN: efficient distributed neuroevolution under communication constraints. - Gurshaant Singh Malik; Lucian Petrica; Nachiket Kapre; Michaela Blott (GECCO Companion, 2020)

Memory-Efficient Dataflow Inference for Deep CNNs on FPGA. - Lucian Petrica; Tobias Alonso; Mairin Kroes; Nicholas J. Fraser; Sorin Cotofana; Michaela Blott (FPT, 2020)

FAT: Training Neural Networks for Reliable Inference Under Hardware Faults. - Ussama Zahid; Giulio Gambardella; Nicholas J. Fraser; Michaela Blott; Kees A. Vissers (ITC, 2020)

Optimized Implementation of the HPCG Benchmark on Reconfigurable Hardware. - Alberto Zeni; Kenneth O'Brien; Michaela Blott; Marco D. Santambrogio (Euro-Par, 2021)

ACCL: FPGA-Accelerated Collectives over 100 Gbps TCP-IP. - Zhenhao He; Daniele Parravicini; Lucian Petrica; Kenneth O'Brien; Gustavo Alonso; Michaela Blott (H2RC@SC, 2021)

Applications and Techniques for Fast Machine Learning in Science. - Allison McCarn Deiana; Nhan Tran; Joshua Agar; Michaela Blott; Giuseppe Di Guglielmo; Javier M. Duarte; Philip C. Harris; Scott Hauck; Mia Liu; Mark S. Neubauer; Jennifer Ngadiuba; Seda Ogrenci Memik; et al. (CoRR, 2021)

Performance vs. hardware requirements in state-of-the-art automatic speech recognition. - Alexandru-Lucian Georgescu; Alessandro Pappalardo; Horia Cucu; Michaela Blott (EURASIP J. Audio Speech Music. Process., 2021)

Benchmarking vision kernels and neural network inference accelerators on embedded platforms. - Murad Qasaimeh; Kristof Denolf; Alireza Khodamoradi; Michaela Blott; Jack Lo; Lisa Halder; Kees A. Vissers; Joseph Zambreno; Phillip H. Jones (J. Syst. Archit., 2021)

Evaluation of Optimized CNNs on Heterogeneous Accelerators Using a Novel Benchmarking Approach. - Michaela Blott; Nicholas J. Fraser; Giulio Gambardella; Lisa Halder; Johannes Kath; Zachary Neveu; Yaman Umuroglu; Alina Vasilciuc; Miriam Leeser; Linda Doyle (IEEE Trans. Computers, 2021)

Machine Learning Aided Hardware Resource Estimation for FPGA DNN Implementations. - Dana Diaconu; Lucian Petrica; Michaela Blott; Miriam Leeser (IPDPS Workshops, 2022)

On the RTL Implementation of FINN Matrix Vector Compute Unit. - Syed Asad Alam; David Gregg; Giulio Gambardella; Michael Preußer; Michaela Blott (CoRR, 2022)

QONNX: Representing Arbitrary-Precision Quantized Neural Networks. - Alessandro Pappalardo; Yaman Umuroglu; Michaela Blott; Jovan Mitrevski; Benjamin Hawks; Nhan Tran; Vladimir Loncar; Sioni Summers; Hendrik Borras; Jules Muhizi; Matthew Trahms; Shih-Chieh Hsu; et al. (CoRR, 2022)

Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark. - Hendrik Borras; Giuseppe Di Guglielmo; Javier M. Duarte; Nicolò Ghielmetti; Benjamin Hawks; Scott Hauck; Shih-Chieh Hsu; Ryan Kastner; Jason Liang; Andres Meza 001; Jules Muhizi; Tai Nguyen 003; et al. (CoRR, 2022)

Towards FPGA Implementation of Neural Network-Based Nonlinearity Mitigation Equalizers in Coherent Optical Transmission Systems. - Pedro J. Freire; Michael Anderson; Bernhard Spinnler; Thomas Bex; Jaroslaw E. Prilepsky; Tobias A. Eriksson; Nelson Costa; Wolfgang Schairer; Michaela Blott; Antonio Napoli; Sergei K. Turitsyn (CoRR, 2022)

LL-GNN: Low Latency Graph Neural Networks on FPGAs for Particle Detectors. - Zhiqiang Que; Marcus Loo; Hongxiang Fan; Michaela Blott; Maurizio Pierini; Alexander D. Tapper; Wayne Luk (CoRR, 2022)

Implementing Neural Network-Based Equalizers in a Coherent Optical Transmission System Using Field-Programmable Gate Arrays. - Pedro J. Freire; Sasipim Srivallapanondh; Michael Anderson; Bernhard Spinnler; Thomas Bex; Tobias A. Eriksson; Antonio Napoli; Wolfgang Schairer; Nelson Costa; Michaela Blott; Sergei K. Turitsyn; Jaroslaw E. Prilepsky (CoRR, 2022)

Evaluating Theoretical Baselines for ML Benchmarking Across Different Accelerators. - Michaela Blott; Alina Vasilciuc; Miriam Leeser; Linda Doyle (IEEE Des. Test, 2022)

Applications and Techniques for Fast Machine Learning in Science. - Allison McCarn Deiana; Nhan Tran; Joshua Agar; Michaela Blott; Giuseppe Di Guglielmo; Javier M. Duarte; Philip C. Harris; Scott Hauck; Mia Liu; Mark S. Neubauer; Jennifer Ngadiuba; Seda Ogrenci Memik; et al. (Frontiers Big Data, 2022)

RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. - Felix Jentzsch; Yaman Umuroglu; Alessandro Pappalardo; Michaela Blott; Marco Platzner (IEEE Micro, 2022)

Elastic-DF: Scaling Performance of DNN Inference in FPGA Clouds through Automatic Partitioning. - Tobias Alonso; Lucian Petrica; Mario Ruiz; Jakoba Petri-Koenig; Yaman Umuroglu; Ioannis Stamelos; Elias Koromilas; Michaela Blott; Kees A. Vissers (ACM Trans. Reconfigurable Technol. Syst., 2022)

Post-Training Quantization with Low-precision Minifloats and Integers on FPGAs. - Shivam Aggarwal; Alessandro Pappalardo; Hans Jakob Damsgaard; Giuseppe Franco; Thomas B. Preußer; Michaela Blott; Tulika Mitra (CoRR, 2023)

AMNES: Accelerating the computation of data correlation using FPGAs. - Monica Chiosa; Thomas B. Preußer; Michaela Blott; Gustavo Alonso (Proc. VLDB Endow., 2023)

Fault-Tolerant Neural Network Accelerators With Selective TMR. - Timoteo García Bertoa; Giulio Gambardella; Nicholas J. Fraser; Michaela Blott; John McAllister (IEEE Des. Test, 2023)

On the RTL Implementation of FINN Matrix Vector Unit. - Syed Asad Alam; David Gregg; Giulio Gambardella; Thomas B. Preußer; Michaela Blott (ACM Trans. Embed. Comput. Syst., 2023)

Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL. - Marius Meyer; Tobias Kenter; Lucian Petrica; Kenneth O'Brien; Michaela Blott; Christian Plessl (Euro-Par (2), 2024)

Shedding the Bits: Pushing the Boundaries of Quantization with Minifloats on FPGAs. - Shivam Aggarwal; Hans Jakob Damsgaard; Alessandro Pappalardo; Giuseppe Franco; Thomas B. Preußer; Michaela Blott; Tulika Mitra (FPL, 2024)

ACCL+: an FPGA-Based Collective Engine for Distributed Applications. - Zhenhao He; Dario Korolija; Yu Zhu; Benjamin Ramhorst; Tristan Laan; Lucian Petrica; Michaela Blott; Gustavo Alonso (OSDI, 2024)

Corrigendum: Applications and techniques for fast machine learning in science. - Allison McCarn Deiana; Nhan Tran; Joshua Agar; Michaela Blott; Giuseppe Di Guglielmo; Javier M. Duarte; Philip C. Harris; Scott Hauck; Mia Liu; Mark S. Neubauer; Jennifer Ngadiuba; Seda Ogrenci-Memik; et al. (Frontiers Big Data, 2024)

LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics. - Zhiqiang Que; Hongxiang Fan; Marcus Loo; He Li 008; Michaela Blott; Maurizio Pierini; Alexander D. Tapper; Wayne Luk (ACM Trans. Embed. Comput. Syst., 2024)

High-efficiency Compressor Trees for Latest AMD FPGAs. - Konstantin Hoßfeld; Hans Jakob Damsgaard; Jari Nurmi; Michaela Blott; Thomas B. Preußer (ACM Trans. Reconfigurable Technol. Syst., 2024)

EcoFlow: Efficient Convolutional Dataflows on Low-Power Neural Network Accelerators. - Lois Orosa 001; Skanda Koppula; Yaman Umuroglu; Konstantinos Kanellopoulos; Juan Gómez-Luna; Michaela Blott; Kees A. Vissers; Onur Mutlu (IEEE Trans. Computers, 2024)

Improving Quantization with Post-Training Model Expansion. - Giuseppe Franco; Pablo Monteagudo-Lago; Ian Colbert; Nicholas J. Fraser; Michaela Blott (CoRR, 2025)

FINN-GL: Generalized Mixed-Precision Extensions for FPGA-Accelerated LSTMs. - Shashwat Khandelwal; Jakoba Petri-Koenig; Thomas B. Preußer; Michaela Blott; Shreejith Shanker (CoRR, 2025)