Exceptions Handling in Hierarchical Petri Net Based Specification for Logic Controllers. - Michal Doligalski; Marian Adamski (ICSEng, 2011)

Role of UML Modelling in Discrete Controller Design. - Grzegorz Labiak; Marian Adamski; Jacek Tkacz; Michal Doligalski; Arkadiusz Bukowiec (ICSEng, 2011)

Behavioral specification of the logic controllers by means of the hierarchical configurable Petri nets. - Michal Doligalski (PDeS, 2012)

Petri Net Dynamic Partial Reconfiguration in FPGA. - Arkadiusz Bukowiec; Michal Doligalski (EUROCAST (1), 2013)

UML state machine implementation in FPGA devices by means of dual model and Verilog. - Michal Doligalski; Marian Adamski (INDIN, 2013)

Flow Rate Control by Means of Flow Meter and PLC Controller. - Sylwia Wlodarczak; Marek Ochowiak; Michal Doligalski; Bartosz Kwapisz; Andzelika Krupinska; Marcin Mrugalski; Magdalena Matuszak (Sensors, 2021)

Monitoring of Measuring Devices Using a Programmable Logic Controller and a Dedicated Desktop Application. - Bartosz Kwapisz; Michal Doligalski; Marek Ochowiak; Marcin Mrugalski; Sylwia Wlodarczak; Andzelika Krupinska; Magdalena Matuszak; Szymon Woziwodzki (Sensors, 2022)