A DSP course for real-time systems design and implementation based on the TMS320C6211 DSK. - Michalis D. Galanis; Arhanassios Papazacharias; Evangelos Zigouris (DSP, 2002)

Power aware data type refinement on the HIPERLAN/2. - Gregory Dimitroulakos; Athanasios Milidonis; Michalis D. Galanis; George Theodoridis; Costas E. Goutis; Francky Catthoor (ICECS, 2003)

A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. - Michalis D. Galanis; Athanasios Milidonis; George Theodoridis; Dimitrios Soudris; Constantinos E. Goutis (DATE, 2004)

Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Dimitrios Soudris; Constantinos E. Goutis (FCCM, 2004)

A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Dimitrios Soudris; Constantinos E. Goutis (FPGA, 2004)

Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Dimitrios Soudris; Constantinos E. Goutis (FPL, 2004)

Comparison of the hardware architectures and FPGA implementations of stream ciphers. - Michalis D. Galanis; Paris Kitsos; Giorgos Kostopoulos; Nicolas Sklavos 001; Odysseas G. Koufopavlou; Costas E. Goutis (ICECS, 2004)

A high performance data-path to accelerate DSP kernels. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Dimitrios Soudris; Costas E. Goutis (ICECS, 2004)

High-speed hardware implementations of the KASUMI block cipher. - Paris Kitsos; Michalis D. Galanis; Odysseas G. Koufopavlou (ISCAS (2), 2004)

Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-Path. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Dimitrios Soudris; Constantinos E. Goutis (PATMOS, 2004)

A Novel Data-Path for Accelerating DSP Kernels. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Dimitrios Soudris; Costas E. Goutis (SAMOS, 2004)

An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications. - Athanasios Milidonis; Grigoris Dimitroulakos; Michalis D. Galanis; George Theodoridis; Constantinos E. Goutis; Francky Catthoor (SCOPES, 2004)

64-bit Block ciphers: hardware implementations and comparison analysis. - Paris Kitsos; Nicolas Sklavos 001; Michalis D. Galanis; Odysseas G. Koufopavlou (Comput. Electr. Eng., 2004)

A Framework for Data Partitioning for C++ Data-Intensive Applications. - Athanasios Milidonis; Gregory Dimitroulakos; Michalis D. Galanis; Athanasios P. Kakarountas; George Theodoridis; Constantinos E. Goutis; Francky Catthoor (Des. Autom. Embed. Syst., 2004)

Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. - Grigoris Dimitroulakos; Michalis D. Galanis; Costas E. Goutis (ASAP, 2005)

Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (ASAP, 2005)

Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (FCCM, 2005)

Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs. - Grigoris Dimitroulakos; Michalis D. Galanis; Costas E. Goutis (FPL, 2005)

Partitioning DSP applications to different granularity reconfigurable hardware. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (ICECS, 2005)

A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. - Grigoris Dimitroulakos; Michalis D. Galanis; Costas E. Goutis (IPDPS, 2005)

A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms. - Michalis D. Galanis; Athanasios Milidonis; George Theodoridis; Dimitrios Soudris; Constantinos E. Goutis (IPDPS, 2005)

A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard. - Grigoris Dimitroulakos; Michalis D. Galanis; Costas E. Goutis; Athanasios Milidonis (ISCAS (1), 2005)

An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays. - Michalis D. Galanis; Gregory Dimitroulakos; Constantinos E. Goutis (ISCAS (4), 2005)

A methodology for partitioning DSP applications in hybrid reconfigurable systems. - Michalis D. Galanis; Athanasios Milidonis; George Theodoridis; Dimitrios Soudris; Constantinos E. Goutis (ISCAS (2), 2005)

A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher. - Paris Kitsos; Michalis D. Galanis; Odysseas G. Koufopavlou (ISCAS (5), 2005)

Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (PATMOS, 2005)

A method for partitioning applications in hybrid reconfigurable architectures. - Michalis D. Galanis; Athanasios Milidonis; George Theodoridis; Dimitrios Soudris; Costas E. Goutis (Des. Autom. Embed. Syst., 2005)

Comparison of the Hardware Implementation of Stream Ciphers. - Michalis D. Galanis; Paris Kitsos; Giorgos Kostopoulos; Nicolas Sklavos 001; Constantinos E. Goutis (Int. Arab J. Inf. Technol., 2005)

A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000. - Grigoris Dimitroulakos; Michalis D. Galanis; Athanasios Milidonis; Constantinos E. Goutis (Integr., 2005)

A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive Kernels. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Constantinos E. Goutis (J. Circuits Syst. Comput., 2005)

An Fpga Implementation of the Gprs Encryption Algorithm 3 (gea3). - Paris Kitsos; Michalis D. Galanis; Odysseas G. Koufopavlou (J. Circuits Syst. Comput., 2005)

Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures. - Grigoris Dimitroulakos; Michalis D. Galanis; Constantinos E. Goutis (IPDPS, 2006)

Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic. - Michalis D. Galanis; Grigoris Dimitroulakos; Constantinos E. Goutis (IPDPS, 2006)

Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware. - Michalis D. Galanis; Grigoris Dimitroulakos; Constantinos E. Goutis (IPDPS, 2006)

Resource constrained modulo scheduling for coarse-grained reconfigurable arrays. - Grigoris Dimitroulakos; Michalis D. Galanis; Constantinos E. Goutis (ISCAS, 2006)

Mapping DSP applications on processor/coarse-grain reconfigurable array architectures. - Michalis D. Galanis; Grigoris Dimitroulakos; Constantinos E. Goutis (ISCAS, 2006)

Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path. - Michalis D. Galanis; Gregory Dimitroulakos; Costas E. Goutis (ICSAMOS, 2006)

Architectures and FPGA Implementations of the 64-Bit MISTY1 Block Cipher. - Paris Kitsos; Michalis D. Galanis; Odysseas G. Koufopavlou (J. Circuits Syst. Comput., 2006)

A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems. - Michalis D. Galanis; Athanasios Milidonis; Athanasios Kakarountas; Costas E. Goutis (Microelectron. J., 2006)

A high-performance data path for synthesizing DSP kernels. - Michalis D. Galanis; George Theodoridis; Spyros Tragoudas; Constantinos E. Goutis (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (J. Supercomput., 2006)

Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (J. Supercomput., 2006)

A unified evaluation framework for coarse grained reconfigurable array architectures. - Grigoris Dimitroulakos; Michalis D. Galanis; Nikos Kostaras; Costas E. Goutis (Conf. Computing Frontiers, 2007)

Compiler assisted architectural exploration for coarse grained reconfigurable arrays. - Grigoris Dimitroulakos; Nikos Kostaras; Michalis D. Galanis; Costas E. Goutis (ACM Great Lakes Symposium on VLSI, 2007)

Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (ACM Great Lakes Symposium on VLSI, 2007)

Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (IPDPS, 2007)

Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (PATMOS, 2007)

Automated framework for partitioning DSP applications in hybrid reconfigurable platforms. - Michalis D. Galanis; Athanasios Milidonis; George Theodoridis; Dimitrios Soudris; Constantinos E. Goutis (Microprocess. Microsystems, 2007)

Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. - Grigoris Dimitroulakos; Michalis D. Galanis; Costas E. Goutis (J. Supercomput., 2007)

Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (J. Supercomput., 2007)

Speedups in embedded systems with a high-performance coprocessor datapath. - Michalis D. Galanis; Gregory Dimitroulakos; Spyros Tragoudas; Costas E. Goutis (ACM Trans. Design Autom. Electr. Syst., 2007)

Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. - Michalis D. Galanis; Grigoris Dimitroulakos; Costas E. Goutis (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Novel Hardware Implementation of the Cipher Message Authentication Code. - Harris E. Michail; Georgios N. Selimis; Michalis D. Galanis; Dimitrios M. Schinianakis; Constantinos E. Goutis (J. Comput. Networks Commun., 2008)

Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path. - Michalis D. Galanis; Costas E. Goutis (J. Syst. Archit., 2008)

Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. - Michalis D. Galanis; Gregory Dimitroulakos; Costas E. Goutis (J. Signal Process. Syst., 2008)

Resource aware mapping on coarse grained reconfigurable arrays. - Grigoris Dimitroulakos; Stavros Georgiopoulos; Michalis D. Galanis; Costas E. Goutis (Microprocess. Microsystems, 2009)

Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. - Grigoris Dimitroulakos; Nikos Kostaras; Michalis D. Galanis; Costas E. Goutis (J. Supercomput., 2009)