Path runner: an accurate and fast timing analyser. - Denis Deschacht; P. Pinede; Michel Robert; Daniel Auvergne (EURO-DAC, 1990)

Input waveform slope effects in CMOS delays. - Daniel Auvergne; Nadine Azémard; Denis Deschacht; Michel Robert (IEEE J. Solid State Circuits, 1990)

Formal sizing rules of CMOS circuits. - Daniel Auvergne; Nadine Azémard; V. Bonzom; Denis Deschacht; Michel Robert (EURO-DAC, 1991)

TVA: A timing verifier with analytic temporal modelling. - D. Navarro; A. Roy; Michel Robert; Denis Deschacht; Daniel Auvergne (Microprocessing and Microprogramming, 1991)

Synchronous-mode evaluation of delays in CMOS structures. - Denis Deschacht; Michel Robert; Daniel Auvergne (IEEE J. Solid State Circuits, 1991)

Post-layout timing simulation of CMOS circuits. - Denis Deschacht; Michel Robert; Nadine Azémard-Crestani; Daniel Auvergne (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Design of a Real Time Geometric Classifier. - Michel Robert; Patrick Gorria; Johel Mitéran; S. Turgis (EDAC-ETC-EUROASIC, 1994)

Influence of Locig Block Layout Architecture on FPGA Performance. - Michel Robert; Lionel Torres; Fernando Moraes 001; Daniel Auvergne (FPL, 1994)

Delay modelling improvement for low voltage applications. - Jean Michel Daga; Michel Robert; Daniel Auvergne (EURO-DAC, 1995)

Concurrent Design of Hardware/Software Dedicated Systems. - Sébastien Pillement; Lionel Torres; Michel Robert; Gaston Cambon (FPL, 1996)

A Recursive Digital Filter Implementation for Noisy and Blurred Images. - Lionel Torres; El-Bay Bourennane; Michel Robert; Michel Paindavoine (Real Time Imaging, 1998)

Implementation of a Wavelet Transform Architecture for Image Processing. - Camille Diou; Lionel Torres; Michel Robert (VLSI, 1999)

RF Interface Design Using Mixed-Mode Methodology. - Augusto Gallegos; Philippe Silvestre; Michel Robert; Daniel Auvergne (VLSI, 1999)

A Virtual CMOS Library Approach for East Layout Synthesis. - Fernando Moraes 001; Michel Robert; Daniel Auvergne (VLSI, 1999)

Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. - S. Raimbault; Gilles Sassatelli; Gamille Cambon; Michel Robert; Sébastien Pillement; Lionel Torres (VLSI, 1999)

Increasing test coverage in a VLSI design course. - Michel Robert (ITC, 1999)

Fast Prototyping: A Case Study - The JPEG Compression Algorithm. - Sébastien Pillement; Lionel Torres; Michel Robert; Gaston Cambon (IEEE International Workshop on Rapid System Prototyping, 1999)

A Wavelet Core for Video Processing. - Camille Diou; Lionel Torres; Michel Robert (ICIP, 2000)

Design of a Classification System for Rectangular Shapes Using a Co-Design Environment. - Rolf Fredi Molz; Paulo Martins Engel; Fernando Gehm Moraes; Lionel Torres; Michel Robert (SBCCI, 2000)

An embedded core for the 2D wavelet transform. - Camille Diou; Lionel Torres; Michel Robert (ETFA (2), 2001)

Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. - Gilles Sassatelli; Lionel Torres; Pascal Benoit; Gaston Cambon; Michel Robert; Jérôme Galy (VLSI-SOC, 2001)

Transistor Level Synthesis Dedicated to Fast I.P. Prototyping. - Alexis Landrault; Ludovic Pellier; Alexandre Richard; Christian Jay; Michel Robert; Daniel Auvergne (PATMOS, 2002)

Iris recognition system for person identification. - Christel-Loïc Tisse; Lionel Martin; Lionel Torres; Michel Robert (PRIS, 2002)

Toward a Pan-European virtual university in electrical and information engineering. - Jean-Marc Thiriet; Michel Robert; Pentti Lappalainen; Michael H. W. Hoffmann; Maria João Martins; Anselmo Seoane (IEEE Trans. Educ., 2002)

A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. - Pascal Benoit; Gilles Sassatelli; Lionel Torres; Michel Robert; Gaston Cambon; Didier Demigny (FPL, 2003)

Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. - Pascal Benoit; Gilles Sassatelli; Lionel Torres; Didier Demigny; Michel Robert; Gaston Cambon (IPDPS, 2003)

Are coarse grain reconfigurable architectures suitable for cryptography? - Daniel Mesquita; Lionel Torres; Fernando Gehm Moraes; Gilles Sassatelli; Michel Robert (VLSI-SOC, 2003)

A flexibility aware budgeting for hierarchical flow timing closure. - Olivier Omedes; Michel Robert; Mohammed Ramdani 004 (ICCAD, 2004)

Design Optimization with Automated Cell Generation. - A. Landrault; Nadine Azémard; Philippe Maurine; Michel Robert; Daniel Auvergne (PATMOS, 2004)

Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. - Pascal Benoit; Gilles Sassatelli; Lionel Torres; Didier Demigny; Michel Robert; Gaston Cambon (SAMOS, 2004)

An Image Sensor with Global Motion Estimation for Micro Camera Module. - F. Gensolen; Guy Cathébras; Lionel Martin; Michel Robert (ACIVS, 2005)

Dynamic hardware multiplexing for coarse grain reconfigurable architectures. - Pascal Benoit; Lionel Torres; Gilles Sassatelli; Michel Robert; Gaston Cambon (FPGA, 2005)

Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. - Pascal Benoit; Jürgen Becker 001; Michel Robert; Lionel Torres; Gilles Sassatelli; Gaston Cambon (FPL, 2005)

Test Engineering Education in Europe - The CRTC experience through the EuNICE-Test project. - Laurent Latorre; Yves Bertrand; Michel Robert; Marie-Lise Flottes (EDUTECH, 2005)

Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. - Pascal Benoit; Lionel Torres; Gilles Sassatelli; Michel Robert; Gaston Cambon (IPDPS, 2005)

A Method to Design Compact Dual-rail Asynchronous Primitives. - Alin Razafindraibe; Michel Robert; Marc Renaudin; Philippe Maurine (PATMOS, 2005)

A new hardware countermeasure for masking power signatures of crypto cores. - Daniel Mesquita; Jean-Denis Techer; Lionel Torres; Gilles Sassatelli; Gaston Cambon; Michel Robert; Fernando Moraes 001 (ReCoSoC, 2005)

Current mask generation: a transistor level security against DPA attacks. - Daniel Mesquita; Jean-Denis Techer; Lionel Torres; Gilles Sassatelli; Gaston Cambon; Michel Robert; Fernando Moraes 001 (SBCCI, 2005)

Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. - Daniel Mesquita; Jean-Denis Techer; Lionel Torres; Michel Robert; Guy Cathébras; Gilles Sassatelli; Fernando Gehm Moraes (VLSI-SoC, 2005)

Compact and Secured Primitives for the Design of Asynchronous Circuits. - Alin Razafindraibe; Michel Robert; Philippe Maurine (J. Low Power Electron., 2005)

Distributed system design based on dependability evaluation: a case study on a pilot thermal process. - Blaise Conrard; Jean-Marc Thiriet; Michel Robert (Reliab. Eng. Syst. Saf., 2005)

Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. - Pascal Benoit; Gilles Sassatelli; Lionel Torres; Michel Robert; Gaston Cambon; Didier Demigny (Tech. Sci. Informatiques, 2005)

A Leak Resistant Architecture Against Side Channel Attacks. - Daniel Mesquita; Benoît Badrignans; Lionel Torres; Gilles Sassatelli; Michel Robert; Jean-Claude Bajard; Fernando Gehm Moraes (FPL, 2006)

A Leak Resistant SoC to Counteract Side Channel Attacks. - Daniel Mesquita; Benoît Badrignans; Lionel Torres; Gilles Sassatelli; Michel Robert; Fernando Gehm Moraes (SoC, 2006)

Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. - Pascal Benoit; Lionel Torres; Gilles Sassatelli; Michel Robert; Gaston Cambon; Jürgen Becker 001 (ISVLSI, 2006)

Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. - Alin Razafindraibe; Michel Robert; Philippe Maurine (PATMOS, 2006)

A Parallel and Secure Architecture for Asymmetric Cryptography. - Benoît Badrignans; Daniel Mesquita; Jean-Claude Bajard; Lionel Torres; Gilles Sassatelli; Michel Robert (ReCoSoC, 2006)

Security evaluation of dual rail logic against DPA attacks. - Alin Razafindraibe; Philippe Maurine; Michel Robert; Marc Renaudin (VLSI-SoC, 2006)

Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. - Gilles Sassatelli; Nicolas Saint-Jean; Pascal Benoit; Lionel Torres; Michel Robert; Cristiane R. Woszezenki; Ismael Grehs; Fernando Gehm Moraes (FCCM, 2007)

A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. - Daniel Mesquita; Benoît Badrignans; Lionel Torres; Gilles Sassatelli; Michel Robert; Fernando Moraes 001 (IPDPS, 2007)

HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. - Nicolas Saint-Jean; Gilles Sassatelli; Pascal Benoit; Lionel Torres; Michel Robert (ISVLSI, 2007)

Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA. - Alin Razafindraibe; Michel Robert; Philippe Maurine (PATMOS, 2007)

HS Scale: A run-time adaptable MP-SoC architecture. - Nicolas Saint-Jean; Camille Jalier; Gilles Sassatelli; Pascal Benoit; Lionel Torres; Michel Robert (ReCoSoC, 2007)

Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. - Nicolas Saint-Jean; Pascal Benoit; Gilles Sassatelli; Lionel Torres; Michel Robert (ICSAMOS, 2007)

Improvement of dual rail logic as a countermeasure against DPA. - Alin Razafindraibe; Michel Robert; Philippe Maurine (VLSI-SoC, 2007)

A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. - Michael Yap San Min; Philippe Maurine; Magali Bastian; Michel Robert (DELTA, 2008)

Bio-inspiration helps computers: A new machine. - Nicolas Saint-Jean; Gilles Sassatelli; Pascal Benoit; Lionel Torres; Michel Robert (FPL, 2008)

BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications. - Olivier Brousse; Gilles Sassatelli; Thierry Gil; Yoann Guillemenet; Michel Robert; François Grize; Eduardo Sanchez; Yann Thoma; Andres Upegui; Juan Manuel Moreno; Jordi Madrenas (GEM, 2008)

The Perplexus Programming Framework: Combining Bio-inspiration and Agent-Oriented Programming for the Simulation of Large Scale Complex Systems. - Olivier Brousse; Gilles Sassatelli; Thierry Gil; Michel Robert; François Grize; Eduardo Sanchez; Andres Upegui; Yann Thoma (ICES, 2008)

Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects. - Michael Yap San Min; Philippe Maurine; Magali Bastian; Michel Robert (ISVLSI, 2008)

Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier. - Bettina Rebaud; Marc Belleville; Christian Bernard; Zeqin Wu; Michel Robert; Philippe Maurine; Nadine Azémard (ISVLSI, 2008)

MPI-Based Adaptive Task Migration Support on the HS-Scale System. - Nicolas Saint-Jean; Pascal Benoit; Gilles Sassatelli; Lionel Torres; Michel Robert (ISVLSI, 2008)

Triple Rail Logic Robustness against DPA. - Victor Lomné; Thomas Ordas; Philippe Maurine; Lionel Torres; Michel Robert; Rafael Soares; Ney Calazans (ReConFig, 2008)

Evaluating the robustness of secure triple track logic through prototyping. - Rafael Soares; Ney Laert Vilar Calazans; Victor Lomné; Philippe Maurine; Lionel Torres; Michel Robert (SBCCI, 2008)

A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive Applications. - Olivier Brousse; Jérémie Guillot; Gilles Sassatelli; Thierry Gil; Michel Robert; Juan Manuel Moreno; Alessandro E. P. Villa; Eduardo Sanchez (AHS, 2009)

JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator. - Olivier Brousse; Jérémie Guillot; Thierry Gil; François Grize; Gilles Sassatelli; Juan Manuel Moreno; Jordi Madrenas; Alessandro E. P. Villa; Henri Volken; Michel Robert (IEEE Congress on Evolutionary Computation, 2009)

Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. - Victor Lomné; Philippe Maurine; Lionel Torres; Michel Robert; Rafael Soares; Ney Calazans (DATE, 2009)

Digital Timing Slack Monitors and Their Specific Insertion Flow for Adaptive Compensation of Variabilities. - Bettina Rebaud; Marc Belleville; Edith Beigné; Christian Bernard; Michel Robert; Philippe Maurine; Nadine Azémard (PATMOS, 2009)

Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. - Amine Dehbaoui; Victor Lomné; Philippe Maurine; Lionel Torres; Michel Robert (VLSI-SoC, 2009)

An Adaptive Message Passing MPSoC Framework. - Gabriel Marchesan Almeida; Gilles Sassatelli; Pascal Benoit; Nicolas Saint-Jean; Sameer Varyani; Lionel Torres; Michel Robert (Int. J. Reconfigurable Comput., 2009)

Differential Power Analysis enhancement with statistical preprocessing. - Victor Lomné; Amine Dehbaoui; Philippe Maurine; Lionel Torres; Michel Robert (DATE, 2010)

Providing Better Multi-processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback Mechanism. - Gabriel Marchesan Almeida; Sameer Varyani; Rémi Busseuil; Nicolas Hebert; Gilles Sassatelli; Pascal Benoit; Lionel Torres; Michel Robert (ReConFig, 2010)

Adaptation Strategies in Multiprocessors System on Chip. - Rémi Busseuil; Gabriel Marchesan Almeida; Luciano Ost; Sameer Varyani; Gilles Sassatelli; Michel Robert (VLSI-SoC (Selected Papers), 2010)

Spatial EM jamming: A countermeasure against EM Analysis? - François Poucheret; Lyonel Barthe; Pascal Benoit; Lionel Torres; Philippe Maurine; Michel Robert (VLSI-SoC, 2010)

Run-time mapping for dynamic reconfiguration management in embedded systems. - Pascal Benoit; Lionel Torres; Gilles Sassatelli; Michel Robert; Nicolas Saint-Jean (Int. J. Embed. Syst., 2010)

An Introduction to Multi-Core System on Chip - Trends and Challenges. - Lionel Torres; Pascal Benoit; Gilles Sassatelli; Michel Robert; Fabien Clermidy; Diego Puschini (Multiprocessor System-on-Chip, 2011)

Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration. - Rémi Busseuil; Lyonel Barthe; Gabriel Marchesan Almeida; Luciano Ost; Florent Bruguier; Gilles Sassatelli; Pascal Benoit; Michel Robert; Lionel Torres (ReConFig, 2011)

Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling. - Luciano Ost; Gabriel Marchesan Almeida; Marcelo Mandelli; Eduardo Wächter; Sameer Varyani; Gilles Sassatelli; Leandro Soares Indrusiak; Michel Robert; Fernando Moraes 001 (ReCoSoC, 2011)

Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. - Luciano Ost; Marcelo Mandelli; Gabriel Marchesan Almeida; Leandro Soares Indrusiak; Leandro Möller; Manfred Glesner; Gilles Sassatelli; Michel Robert; Fernando Moraes 001 (SBCCI, 2011)

PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip. - Gabriel Marchesan Almeida; Rémi Busseuil; Luciano Ost; Florent Bruguier; Gilles Sassatelli; Pascal Benoit; Lionel Torres; Michel Robert (IEEE Embed. Syst. Lett., 2011)

Timing slack monitoring under process and environmental variations: Application to a DSP performance optimization. - Bettina Rebaud; Marc Belleville; Edith Beigné; Christian Bernard; Michel Robert; Philippe Maurine; Nadine Azémard (Microelectron. J., 2011)

Remote Execution in Distributed Memory MPSoC. - Rémi Busseuil; Luciano Ost; Rafael Garibotti; Gilles Sassatelli; Michel Robert (FCCM, 2012)

A Mobile Computing Framework for Pervasive Adaptive Platforms. - Olivier Brousse; Jérémie Guillot; Gilles Sassatelli; Thierry Gil; François Grize; Michel Robert (Int. J. Distributed Sens. Networks, 2012)

Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. - Amine Dehbaoui; Victor Lomné; Thomas Ordas; Lionel Torres; Michel Robert; Philippe Maurine (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Simultaneous multithreading support in embedded distributed memory MPSoCs. - Rafael Garibotti; Luciano Ost; Rémi Busseuil; Mamady kourouma; Chris Adeniyi-Jones; Gilles Sassatelli; Michel Robert (DAC, 2013)

Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. - Luciano Ost; Marcelo Mandelli; Gabriel Marchesan Almeida; Leandro Möller; Leandro Soares Indrusiak; Gilles Sassatelli; Pascal Benoit; Manfred Glesner; Michel Robert; Fernando Moraes 001 (ACM Trans. Embed. Comput. Syst., 2013)

Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures. - Anastasiia Butko; Abdoulaye Gamatié; Gilles Sassatelli; Lionel Torres; Michel Robert (ISVLSI, 2015)

Overview of narrowband IoT in LTE Rel-13. - Rapeepat Ratasuk; Nitin Mangalvedhe; Yanji Zhang; Michel Robert; Jussi-Pekka Koskinen (CSCN, 2016)

Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration. - Anastasiia Butko; Florent Bruguier; Abdoulaye Gamatié; Gilles Sassatelli; David Novo; Lionel Torres; Michel Robert (MCSoC, 2016)

Data Channel Design and Performance for LTE Narrowband IoT. - Rapeepat Ratasuk; Nitin Mangalvedhe; Jorma Kaikkonen; Michel Robert (VTC Fall, 2016)

Enhancements of narrowband IoT in 3GPP Rel-14 and Rel-15. - Rapeepat Ratasuk; Nitin Mangalvedhe; Zhilan Xiong; Michel Robert; David Bhatoolaul (CSCN, 2017)

Optimization of Data and Energy Migrations in Mini Data Centers for Carbon-Neutral Computing. - Marcos de Melo da Silva; Abdoulaye Gamatié; Gilles Sassatelli; Michael Poss; Michel Robert (IEEE Trans. Sustain. Comput., 2023)

A model-based approach to addressing energy demand in sustainable urban systems. - Abdoulaye Gamatié; Thomas Leduc; Daniel Siret; Gilles Sassatelli; Michel Robert (Sustain. Comput. Informatics Syst., 2023)