Low consumption home femto base stations. - Ivaylo Haratcherev; Carine Balageas; Michele Fiorito (PIMRC, 2009)

Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications. - Fabrizio Ferrandi; Vito Giovanni Castellana; Serena Curzel; Pietro Fezzardi; Michele Fiorito; Marco Lattuada 001; Marco Minutoli; Christian Pilato; Antonino Tumeo (DAC, 2021)

De-specializing an HLS library for Deep Neural Networks: improvements upon hls4ml. - Serena Curzel; Nicolò Ghielmetti; Michele Fiorito; Fabrizio Ferrandi (CoRR, 2021)

MLIR Loop Optimizations for High-Level Synthesis: A Case Study. - Serena Curzel; Sofija Jovic; Michele Fiorito; Antonino Tumeo; Fabrizio Ferrandi (PACT, 2022)

Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis. - Vito Giovanni Castellana; Nicolas Bohm Agostini; Ankur Limaye; Vinay Amatya; Marco Minutoli; Joseph B. Manzano; Antonino Tumeo; Serena Curzel; Michele Fiorito; Fabrizio Ferrandi (ASP-DAC, 2023)

Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications. - Serena Curzel; Michele Fiorito; Patricia López Cueva; Tiago Jorge; Thanassis Tsiodras; Fabrizio Ferrandi (CF, 2023)

High-Level Synthesis of the OpenMP runtime to improve the generation of parallel accelerators. - Giovanni Gozzi; Michele Fiorito; Serena Curzel; Fabrizio Ferrandi (CF, 2023)

HERMES: qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem. - Nadia Ibellaatti; Edouard Lepape; Alp Kiliç; Kaya Akyel; Kassem Chouayakh; Fabrizio Ferrandi; Claudio Barone; Serena Curzel; Michele Fiorito; Giovanni Gozzi; Miguel Masmano; Ana Risquez Navarro; et al. (DATE, 2023)

TrueFloat: A Templatized Arithmetic Library for HLS Floating-Point Operators. - Michele Fiorito; Serena Curzel; Fabrizio Ferrandi (SAMOS, 2023)

Towards Automated Generation of Chiplet-Based Systems Invited Paper. - Ankur Limaye; Claudio Barone; Nicolas Bohm Agostini; Marco Minutoli; Joseph B. Manzano; Vito Giovanni Castellana; Giovanni Gozzi; Michele Fiorito; Serena Curzel; Fabrizio Ferrandi; Antonino Tumeo (ASPDAC, 2024)

A DNN-based Background Segmentation Accelerator for FPGA-equipped satellites. - Michele Fiorito; Serena Curzel; Giovanni Gozzi; Fabrizio Ferrandi (CF (Companion), 2024)

Pre-scheduling of Affine Loops for HLS Pipelining. - Serena Curzel; Sofija Jovic; Michele Fiorito; Antonino Tumeo; Fabrizio Ferrandi (Euro-Par Workshops (2), 2024)

Etna: MLIR-Based System-Level Design and Optimization for Transparent Application Execution on CPU-FPGA Nodes. - Stephanie Soldavini; Felix Suchert; Serena Curzel; Michele Fiorito; Karl F. A. Friebel; Fabrizio Ferrandi; Radim Cmar; Jerónimo Castrillón; Christian Pilato (FCCM, 2024)

High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk). - Fabrizio Ferrandi; Michele Fiorito; Claudio Barone; Giovanni Gozzi; Serena Curzel (PARMA-DITAM, 2024)

Extending High-Level Synthesis with AI/ML Methods. - Nicolas Bohm Agostini; Giovanni Gozzi; Michele Fiorito; Claudio Barone; Serena Curzel; Ankur Limaye; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Fabrizio Ferrandi; Antonino Tumeo (ICCAD, 2024)

To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated Accelerators. - Claudio Barone; Rishika Kushwah; Ankur Limaye; Vito Giovanni Castellana; Giovanni Gozzi; Michele Fiorito; Fabrizio Ferrandi; Antonino Tumeo (MEMSYS, 2024)

A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems. - Ankur Limaye; Nicolas Bohm Agostini; Claudio Barone; Vito Giovanni Castellana; Michele Fiorito; Fabrizio Ferrandi; Andres Marquez 001; Antonino Tumeo (ASP-DAC, 2025)

POSTER: A System-level HW/SW Co-simulation Framework for HLS-generated Accelerators. - Michele Fiorito; Serena Curzel; Fabrizio Ferrandi (CF, 2025)

SPARTA: High-Level Synthesis of Parallel Multi-Threaded Accelerators. - Giovanni Gozzi; Michele Fiorito; Serena Curzel; Claudio Barone; Vito Giovanni Castellana; Marco Minutoli; Antonino Tumeo; Fabrizio Ferrandi (ACM Trans. Reconfigurable Technol. Syst., 2025)