A general model of concurrency and its implementation as many-core dynamic RISC processors. - Thomas A. M. Bernard; Kostas Bousias; Liang Guang; Chris R. Jesshope; Mike Lankamp; Michiel W. van Tol; Li Zhang 034 (ICSAMOS, 2008)

An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency. - Chris R. Jesshope; Jean-Marc Philippe; Michiel W. van Tol (SAMOS, 2008)

An implementation of the SANE Virtual Processor using POSIX threads. - Michiel W. van Tol; Chris R. Jesshope; Mike Lankamp; Simon Polstra (J. Syst. Archit., 2009)

An Operating System Strategy for General-purpose Parallel Computing on Many-core Architectures. - Michiel W. van Tol; Chris R. Jesshope (High Performance Computing Workshop, 2010)

Towards scalable I/O on a many-core architecture. - Michael A. Hicks 001; Michiel W. van Tol; Chris R. Jesshope (ICSAMOS, 2010)

Efficient Memory Copy Operations on the 48-core Intel SCC Processor. - Michiel W. van Tol; Roy Bakker; Merijn Verstraaten; Clemens Grelck; Chris R. Jesshope (MARC Symposium, 2011)

Mapping Distributed S-Net on the 48-core Intel SCC processor. - Merijn Verstraaten; Clemens Grelck; Michiel W. van Tol; Roy Bakker; Chris R. Jesshope (MARC Symposium, 2011)

A Framework for Self-adaptive Collaborative Computing on Reconfigurable Platforms. - Michiel W. van Tol; Zdenek Pohl; Milan Tichý (PARCO, 2011)

Extending and Implementing the Self-adaptive Virtual Processor for Distributed Memory Architectures - Michiel W. van Tol; Juha Koivisto (CoRR, 2011)

A Characterization of the SPARC T3-4 System - Michiel W. van Tol (CoRR, 2011)

High Level Simulation of SVP Many-Core Systems. - Muhammad Irfan Uddin; Michiel W. van Tol; Chris R. Jesshope (Parallel Process. Lett., 2011)

Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management. - Raphael Poss; Mike Lankamp; Qiang Yang 006; Jian Fu; Michiel W. van Tol; Chris R. Jesshope (DSD, 2012)

Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores. - Muhammad Irfan Uddin; Chris R. Jesshope; Michiel W. van Tol; Raphael Poss (RAPIDO, 2012)

Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management. - Raphael Poss; Mike Lankamp; Qiang Yang 006; Jian Fu; Michiel W. van Tol; Muhammad Irfan Uddin; Chris R. Jesshope (Microprocess. Microsystems, 2013)

Emulating Asymmetric MPSoCs on the Intel SCC Many-Core Processor. - Roy Bakker; Michiel W. van Tol; Andy D. Pimentel (PDP, 2014)