ATTEMPT-1: A Reconfigurable Multiprocessor Testbed. - Keisuke Inoue; Toru Kisuki; Michitaka Okuno; Etsuko Shimizu; Takuya Terasawa; Hideharu Amano (FPL, 1996)

A 100-Gb-Ethernet subsystem for next-generation metro-area network. - Hidehiro Toyoda; Shinji Nishimura; Michitaka Okuno; Ryouji Yamaoka; Hiroaki Nishi (ICC, 2005)

Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router. - Michitaka Okuno; Shinichi Ishida; Hiroaki Nishi (IEICE Trans. Electron., 2005)

Cache-Based Network Processor Architecture: Evaluation with Real Network Traffic. - Michitaka Okuno; Shinji Nishimura; Shinichi Ishida; Hiroaki Nishi (IEICE Trans. Electron., 2006)

100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet. - Hidehiro Toyoda; Shinji Nishimura; Michitaka Okuno; Kouji Fukuda; Kouji Nakahara; Hiroaki Nishi (IEICE Trans. Commun., 2006)

A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications. - Hidehiro Toyoda; Shinji Nishimura; Michitaka Okuno; Matsuaki Terada (IEICE Trans. Electron., 2007)

A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet. - Hidehiro Toyoda; Michitaka Okuno; Shinji Nishimura; Matsuaki Terada (ICC, 2008)

Design and Evaluation of 10 Gbps Optical Access System Using Optical Switches. - Koji Wakayama; Michitaka Okuno; Jun Sugawa; Daisuke Mashimo; Hiroki Ikeda; Kenichi Sakamoto (IEICE Trans. Commun., 2010)