Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs. - Miguel Lino Silva; João Canas Ferreira (DSD, 2005)

Support for partial run-time reconfiguration of platform FPGAs. - Miguel Lino Silva; João Canas Ferreira (J. Syst. Archit., 2006)

Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems. - Miguel Lino Silva; João Canas Ferreira (IET Comput. Digit. Tech., 2007)

Generation of partial FPGA configurations at run-time. - Miguel Lino Silva; João Canas Ferreira (FPL, 2008)

Creation of Partial FPGA Configurations at Run-Time. - Miguel Lino Silva; João Canas Ferreira (DSD, 2010)

Run-time generation of partial FPGA configurations. - Miguel Lino Silva; João Canas Ferreira (J. Syst. Archit., 2012)

Run-time generation of partial FPGA configurations for subword operations. - Miguel Lino Silva; João Canas Ferreira (Microprocess. Microsystems, 2012)