Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits. - Saleh Safiruddin; Mihai Lefter; Demid Borodin; George Razvan Voicu; Sorin Dan Cotofana (NANOARCH, 2012)

3D stacked wide-operand adders: A case study. - George Razvan Voicu; Mihai Lefter; Marius Enachescu; Sorin Dan Cotofana (ASAP, 2013)

Is TSV-based 3D integration suitable for inter-die memory repair? - Mihai Lefter; George Razvan Voicu; Mottaqiallah Taouil; Marius Enachescu; Said Hamdioui; Sorin Dan Cotofana (DATE, 2013)

Exploring test opportunities for memory and interconnects in 3D ICs. - Mottaqiallah Taouil; Mihai Lefter; Said Hamdioui (IDT, 2013)

Ultra low power NEMFET based logic. - Marius Enachescu; Mihai Lefter; Antonios Bazigos; Adrian M. Ionescu; Sorin Dan Cotofana (ISCAS, 2013)

Energy effective 3D stacked hybrid NEMFET-CMOS caches. - Mihai Lefter; Marius Enachescu; George Razvan Voicu; Sorin Dan Cotofana (NANOARCH, 2014)

A shared polyhedral cache for 3D wide-I/O multi-core computing platforms. - Mihai Lefter; George Razvan Voicu; Sorin Dan Cotofana (ISCAS, 2015)

LDPC-Based Adaptive Multi-Error Correction for 3D Memories. - Mihai Lefter; George Razvan Voicu; Thomas Marconi; Valentin Savin; Sorin Dan Cotofana (ICCD, 2017)

Low cost multi-error correction for 3D polyhedral memories. - Mihai Lefter; Thomas Marconi; George Razvan Voicu; Sorin Dan Cotofana (NANOARCH, 2017)

Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory. - Marius Enachescu; Mihai Lefter; George Razvan Voicu; Sorin Dan Cotofana (IEEE Trans. Emerg. Top. Comput., 2018)

Mutalyzer 2: next generation HGVS nomenclature checker. - Mihai Lefter; Jonathan K. Vis; Martijn Vermaat; Johan T. den Dunnen; Peter E. M. Taschner; Jeroen F. J. Laros (Bioinform., 2021)

A Graph-based Approach to Variant Extraction. - Mark A. Santcroos; Walter A. Kosters; Mihai Lefter; Jeroen F. J. Laros; Jonathan K. Vis (CoRR, 2025)