Test time reduction of successive approximation register A/D converter by selective code measurement. - Shalabh Goyal; Abhijit Chatterjee; Mike Atia; Howard Iglehart; Chung Yu Chen; Bassem Shenouda; Nash Khouzam; Hosam Haggag (ITC, 2005)

Reducing Sampling Clock Jitter to Improve SNR Measurement of A/D Converters in Production Test. - Shalabh Goyal; Abhijit Chatterjee; Mike Atia (ETS, 2006)