A 14-bit 100-Msample/s subranging ADC. - Carl Moreland; Frank Murden; Michael Elliott; Joe Young; Mike Hensley; Russell Stop (IEEE J. Solid State Circuits, 2000)

A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations [receiver]. - Mike Hensley; Carroll Speir; Russell Stop; Kevin Behel; Carl Moreland; Greg Patterson; Dan Kelly; Manish Manglani; Michael Elliott; Scott Puckett; Joe Young; Frank Murden (CICC, 2004)

A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration. - Ahmed M. A. Ali; Andy Morgan; Christopher Dillon; Greg Patterson; Scott Puckett; Mike Hensley; Russell Stop; Paritosh Bhoraskar; Scott Bardsley; David Lattimore; Jeff Bray; Carroll Speir; et al. (ISSCC, 2010)

A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration. - Ahmed M. A. Ali; Andrew S. Morgan; Christopher Dillon; Greg Patterson; Scott Puckett; Paritosh Bhoraskar; Hüseyin Dinc; Mike Hensley; Russell Stop; Scott Bardsley; David Lattimore; Jeff Bray; et al. (IEEE J. Solid State Circuits, 2010)