Cost-free scan: a low-overhead scan path design methodology. - Chih-Chang Lin; Mike Tien-Chien Lee; Malgorzata Marek-Sadowska; Kuang-Chien Chen (ICCAD, 1995)

Power analysis and low-power scheduling techniques for embedded DSP software. - Mike Tien-Chien Lee; Vivek Tiwari; Sharad Malik; Masahiro Fujita (ISSS, 1995)

Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures. - Guido Araujo; Sharad Malik; Mike Tien-Chien Lee (DAC, 1996)

Domain-Specific High-Level Modeling and Synthesis for ATM Switch Design Using VHDL. - Mike Tien-Chien Lee; Yu-Chin Hsu; Ben Chen; Masahiro Fujita (DAC, 1996)

Test Point Insertion: Scan Paths through Combinational Logic. - Chih-Chang Lin; Malgorzata Marek-Sadowska; Kwang-Ting Cheng; Mike Tien-Chien Lee (DAC, 1996)

Sequential Permissible Functions and their Application to Circuit Optimization. - Chih-Chang Lin; Malgorzata Marek-Sadowska; Kuang-Chien Chen; Mike Tien-Chien Lee (ED&TC, 1996)

A novel methodology for transistor-level power estimation. - Shi-Yu Huang; Kwang-Ting Cheng; Kuang-Chien Chen; Mike Tien-Chien Lee (ISLPED, 1996)

Instruction level power analysis and optimization of software. - Vivek Tiwari; Sharad Malik; Andrew Wolfe; Mike Tien-Chien Lee (J. VLSI Signal Process., 1996)

On the control-subroutine implementation of subprogram synthesis. - Cheng-Tsung Hwang; Hsiao-Chien Weng; Yu-Chin Hsu; Mike Tien-Chien Lee (ASP-DAC, 1997)

A Test Synthesis Approach to Reducing BALLAST DFT Overhead. - Douglas Chang; Mike Tien-Chien Lee; Malgorzata Marek-Sadowska; Takashi Aikyo; Kwang-Ting Cheng (DAC, 1997)

Domain-Specific High-Level Modeling and Synthesis for ATM Switch Prototyping. - Mike Tien-Chien Lee; Yu-Chin Hsu; Ben Chen; Masahiro Fujita (Des. Autom. Embed. Syst., 1997)

Power analysis and minimization techniques for embedded DSP software. - Mike Tien-Chien Lee; Vivek Tiwari; Sharad Malik; Masahiro Fujita (IEEE Trans. Very Large Scale Integr. Syst., 1997)

Functional Scan Chain Testing. - Douglas Chang; Kwang-Ting Cheng; Malgorzata Marek-Sadowska; Mike Tien-Chien Lee (DATE, 1998)

Test-point insertion: scan paths through functional logic. - Chih-Chang Lin; Malgorzata Marek-Sadowska; Kwang-Ting Cheng; Mike Tien-Chien Lee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Cost-free scan: a low-overhead scan path design. - Chih-Chang Lin; Malgorzata Marek-Sadowska; Mike Tien-Chien Lee; Kuang-Chien Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

ATM switch design by high-level modeling, formal verification and high-level synthesis. - Sreeranga P. Rajan; Masahiro Fujita; K. Yuan; Mike Tien-Chien Lee (ACM Trans. Design Autom. Electr. Syst., 1998)

Eliminating false loops caused by sharing in control path. - Alan Su 002; Yu-Chin Hsu; Ta-Yung Liu; Mike Tien-Chien Lee (ACM Trans. Design Autom. Electr. Syst., 1998)

Power Analysis of a 32-bit Embedded Microcontroller. - Vivek Tiwari; Mike Tien-Chien Lee (VLSI Design, 1998)