Assessing the suitability of the NGMP multi-core processor in the space domain. - Mikel Fernández; Roberto Gioiosa; Eduardo Quiñones; Luca Fossati; Marco Zulianello; Francisco J. Cazorla (EMSOFT, 2012)

PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. - Francisco J. Cazorla; Jaume Abella 001; Jan Andersson; Tullio Vardanega; Francis Vatrinet; Iain Bate; Ian Broster; Mikel Azkarate-askasua; Franck Wartel; Liliana Cucu; Fabrice Cros; Glenn Farrall; et al. (DSD, 2016)

pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems. - Mladen Slijepcevic; Mikel Fernández; Carles Hernández 001; Jaume Abella 001; Eduardo Quiñones; Francisco J. Cazorla (DSD, 2016)

Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems. - David Trilla; Javier Jalle; Mikel Fernández; Jaume Abella 001; Francisco J. Cazorla (RTAS, 2016)

Contention-aware performance monitoring counte support for real-time MPSoCs. - Javier Jalle; Mikel Fernández; Jaume Abella 001; Jan Andersson; Mathieu Patte; Luca Fossati; Marco Zulianello; Francisco J. Cazorla (SIES, 2016)

MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding. - Enrique Díaz; Mikel Fernández; Leonidas Kosmidis; Enrico Mezzetti; Carles Hernández 001; Jaume Abella 001; Francisco J. Cazorla (Ada-Europe, 2017)

Probabilistic timing analysis on time-randomized platforms for the space domain. - Mikel Fernández; David Morales; Leonidas Kosmidis; Alen Bardizbanyan; Ian Broster; Carles Hernández 001; Eduardo Quiñones; Jaume Abella 001; Francisco J. Cazorla; Paulo Machado; Luca Fossati (DATE, 2017)

EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application. - Enrico Mezzetti; Mikel Fernández; Alen Bardizbanyan; Irune Agirre; Jaume Abella 001; Tullio Vardanega; Francisco J. Cazorla (RTAS, 2017)

Multicore Early Design Stage Guaranteed Performance Estimates for the Space Domain. - Mikel Fernández; Gabriel Fernandez 002; Jaume Abella 001; Francisco J. Cazorla (DATE, 2019)

STT-MRAM for real-time embedded systems: performance and WCET implications. - Kazi Asifuzzaman; Mikel Fernández; Petar Radojkovic; Jaume Abella 001; Francisco J. Cazorla (MEMSYS, 2019)

Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study. - Xavier Palomo; Mikel Fernández; Sylvain Girbal; Enrico Mezzetti; Jaume Abella 001; Francisco J. Cazorla; Laurent Rioux (ECRTS, 2020)

On the reliability of hardware event monitors in MPSoCs for critical domains. - Javier Barrera; Leonidas Kosmidis; Hamid Tabani; Enrico Mezzetti; Jaume Abella 001; Mikel Fernández; Guillem Bernat; Francisco J. Cazorla (SAC, 2020)