A Simple Clockless Network-on-Chip for a Commercial Audio DSP Chip. - Mikkel Bystrup Stensgaard; Tobias Bjerregaard; Jens Sparsø; Johnny Halkjær Pedersen (DSD, 2006)

A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method. - Tobias Bjerregaard; Mikkel Bystrup Stensgaard; Jens Sparsø (DATE, 2007)

ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology. - Mikkel Bystrup Stensgaard; Jens Sparsø (NOCS, 2008)

Synthesis of topology configurations and deadlock free routing algorithms for ReNoC-based systems-on-chip. - Matthias Bo Stuart; Mikkel Bystrup Stensgaard; Jens Sparsø (CODES+ISSS, 2009)

The ReNoC Reconfigurable Network-on-Chip: Architecture, Configuration Algorithms, and Evaluation. - Matthias Bo Stuart; Mikkel Bystrup Stensgaard; Jens Sparsø (ACM Trans. Embed. Comput. Syst., 2011)

A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies. - Alberto Ghiribaldi; Hervé Tatenguem Fankem; Federico Angiolini; Mikkel Bystrup Stensgaard; Tobias Bjerregaard; Davide Bertozzi (ASP-DAC, 2014)