Register-Level Communication in Speculative Chip Multiprocessors. - Milan B. Radulovic; Milo Tomasevic; Veljko M. Milutinovic (Adv. Comput., 2014)

Low-level implementation of the SISC protocol for thread-level speculation on a multi-core architecture. - Milan B. Radulovic; Sylvain Girbal; Milo Tomasevic (Parallel Comput., 2017)