Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions. - Milan Funck; Vladimir Herdt; Rolf Drechsler (DDECS, 2022)

Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal Verification. - Milan Funck; Sallar Ahmadi-Pour; Vladimir Herdt; Rolf Drechsler (FDL, 2023)

Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design - a Review of the Final Stage of Project HEP. - Tim Henkes; Steffen Reith; Marc Stöttinger; Norbert Herfurth; Goran Panic; Julian Wälde; Fabian Buschkowski; Pascal Sasdrich; Christoph Lüth; Milan Funck; Tuba Kiyan; Arnd Weber; et al. (DATE, 2024)