Industrial Single Board Computer based on OMAP5 processor. - Milan Radulovic; Marko Pavlovic; Nikola Nenadic; Goran Dimic (MECO, 2013)

Limpio: LIghtweight MPI instrumentatiOn. - Milan Pavlovic; Milan Radulovic; Alex Ramírez; Petar Radojkovic (ICPC, 2015)

Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC? - Milan Radulovic; Darko Zivanovic; Daniel Ruiz 003; Bronis R. de Supinski; Sally A. McKee; Petar Radojkovic; Eduard Ayguadé (MEMSYS, 2015)

Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC. - Kazi Asifuzzaman; Milan Pavlovic; Milan Radulovic; David Zaragoza; Ohseong Kwon; Kyung-Chang Ryoo; Petar Radojkovic (MEMSYS, 2016)

Large-Memory Nodes for Energy Efficient High-Performance Computing. - Darko Zivanovic; Milan Radulovic; Germán Llort; David Zaragoza; Janko Strassburg; Paul M. Carpenter; Petar Radojkovic; Eduard Ayguadé (MEMSYS, 2016)

Main Memory in HPC: Do We Need More or Could We Live with Less? - Darko Zivanovic; Milan Pavlovic; Milan Radulovic; Hyunsung Shin; Jongpil Son; Sally A. McKee; Paul M. Carpenter; Petar Radojkovic; Eduard Ayguadé (ACM Trans. Archit. Code Optim., 2017)

HPC Benchmarking: Scaling Right and Looking Beyond the Average. - Milan Radulovic; Kazi Asifuzzaman; Paul M. Carpenter; Petar Radojkovic; Eduard Ayguadé (Euro-Par, 2018)

Main memory latency simulation: the missing link. - Rommel Sánchez Verdejo; Kazi Asifuzzaman; Milan Radulovic; Petar Radojkovic; Eduard Ayguadé; Bruce L. Jacob (MEMSYS, 2018)

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned. - Milan Radulovic; Kazi Asifuzzaman; Darko Zivanovic; Nikola Rajovic; Guillaume Colin de Verdière; Dirk Pleiter; Manolis Marazakis; Nikolaos D. Kallimanis; Paul M. Carpenter; Petar Radojkovic; Eduard Ayguadé (SBAC-PAD, 2018)

PROFET: Modeling System Performance and Energy Without Simulating the CPU. - Milan Radulovic; Rommel Sánchez Verdejo; Paul M. Carpenter; Petar Radojkovic; Bruce L. Jacob; Eduard Ayguadé (Proc. ACM Meas. Anal. Comput. Syst., 2019)

Memory bandwidth and latency in HPC: system requirements and performance impact. - Milan Radulovic (2019)

Multilevel simulation-based co-design of next generation HPC microprocessors. - Lilia Zaourar; Mohamed Benazouz; Ayoub Mouhagir; Fatma Jebali; Tanguy Sassolas; Jean-Christophe Weill; Carlos Falquez; Nam Ho; Dirk Pleiter; Antoni Portero; Estela Suarez; Polydoros Petrakis; et al. (PMBS, 2021)