Optically Reconfigurable FPGAs: Is this a Future Trend? - Milan Vasilko; Djamel Ait-Boudaoud (FPL, 1996)

Architectural Synthesis Techniques for Dynamically Reconfigurable Logic. - Milan Vasilko; Djamel Ait-Boudaoud (FPL, 1996)

RIFLE-62: A Flexible Environment for Prototyping Dynamically Reconfigurable Systems. - Milan Vasilko; D. Long (International Workshop on Rapid System Prototyping, 1998)

Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems. - Milan Vasilko; David Cabanis (FCCM, 1999)

DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems. - Milan Vasilko (FPL, 1999)

Design Visualisation for Dynamically Reconfigurable Systems. - Milan Vasilko (FPL, 2000)

Automatic Temporal Floorplanning with Guaranteed Solution Feasibility. - Milan Vasilko; Graham Benyon-Tinker (FPL, 2000)

Design synthesis for dynamically reconfigurable logic systems. - Milan Vasilko (2000)

A Rapid Prototyping Methodology and Platform for Seamless Communication Systems. - Milan Vasilko; Lukas Machácek; Marek Matej; Piotr Stepien; Steve Holloway (IEEE International Workshop on Rapid System Prototyping, 2001)

System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. - Tero Rissa; Milan Vasilko; Jarkko Niittylahti (FCCM, 2002)

BIST Based Interconnect Fault Location for FPGAs. - Nicola Campregher; Peter Y. K. Cheung; Milan Vasilko (FPL, 2004)

Analysis of yield loss due to random photolithographic defects in the interconnect structure of FPGAs. - Nicola Campregher; Peter Y. K. Cheung; George A. Constantinides; Milan Vasilko (FPGA, 2005)

Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes. - Nicola Campregher; Peter Y. K. Cheung; George A. Constantinides; Milan Vasilko (FPL, 2005)

Yield enhancements of design-specific FPGAs. - Nicola Campregher; Peter Y. K. Cheung; George A. Constantinides; Milan Vasilko (FPGA, 2006)

Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs. - Nicola Campregher; Peter Y. K. Cheung; George A. Constantinides; Milan Vasilko (FPL, 2006)

On Feasibility of FPGA Bitstream Compression During Placement and Routing. - Piotr Stepien; Milan Vasilko (FPL, 2006)