Low- and Ultra Low-Power Arithmetic Units: Design and Comparison. - Milena Vratonjic; Bart R. Zeydel; Vojin G. Oklobdzija (ICCD, 2005)

Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design. - Milena Vratonjic; Bart R. Zeydel; Vojin G. Oklobdzija (PATMOS, 2006)

Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements. - Christophe Giacomotto; Mandeep Singh; Milena Vratonjic; Vojin G. Oklobdzija (PATMOS, 2008)

The opportunity cost of low power design: a case study in circuit tuning. - Matthew M. Ziegler; Victor V. Zyuban; George Gristede; Milena Vratonjic; Joshua Friedrich (ISLPED, 2009)

A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR). - Milena Vratonjic; Matthew M. Ziegler; George Gristede; Victor V. Zyuban; Thomas Mitchell; Ee Cho; Chandu Visweswariah; Vojin G. Oklobdzija (PATMOS, 2009)

Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization. - N. N. Mojumder; Seung Chul Song; K. Rim; J. Xu; Joseph Wang; J. Zhu; Milena Vratonjic; K. Lin; Martin Saint-Laurent; Paul Bassett; Geoffrey Yeap (VLSIC, 2015)

Power and performance aware memory-controller voting mechanism. - Milena Vratonjic; Harmander Singh; Gautam Kumar; Roumi Mohamed; Ashish Bajaj; Ken Gainey (ISQED, 2018)