Compact and Fast Multiplier Using Dual Array Tree Structure. - Min C. Park; Bang W. Lee; Gwang Moon Kim; Dong H. Kim (ISCAS, 1993)

A Single-slope 80MS/s ADC using Two-Step Time-to-Digital Conversion. - Min C. Park; Michael H. Perrott (ISCAS, 2009)

A VCO-based Analog-to-digital Converter with Second-order Sigma-Delta Noise Shaping. - Min C. Park; Michael H. Perrott (ISCAS, 2009)

A 0.13µm CMOS 78dB SNDR 87mW 20MHz BW CT ΔΣ ADC with VCO-based integrator and quantizer. - Min C. Park; Michael H. Perrott (ISSCC, 2009)

A Time-Domain Resolution Improvement of an RF-DAC. - Min C. Park; Michael H. Perrott; Robert Bogdan Staszewski (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

An Amplitude Resolution Improvement of an RF-DAC Employing Pulsewidth Modulation. - Min C. Park; Michael H. Perrott; Robert Bogdan Staszewski (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)