Capture and Shift Toggle Reduction (CASTR) ATPG to Minimize Peak Power Supply Noise. - Hsiu-Ting Lin; Jen-Yang Wen; James Li; Ming-Tung Chang; Min-Hsiu Tsai; Sheng-Chih Huang; Chili-Mou Tseng (ITC, 2008)

BIST design optimization for large-scale embedded memory cores. - Tzuo-Fan Chien; Wen-Chi Chao; James Chien-Mo Li; Yao-Wen Chang; Kuan-Yu Liao; Ming-Tung Chang; Min-Hsiu Tsai; Chih-Mou Tseng (ICCAD, 2009)

TSV redundancy: Architecture and design issues in 3D IC. - Ang-Chih Hsieh; TingTing Hwang; Ming-Tung Chang; Min-Hsiu Tsai; Chih-Mou Tseng; Hung-Chun Li (DATE, 2010)

Test clock domain optimization for peak power supply noise reduction during scan. - Jen-Yang Wen; Yu-Chuan Huang; Min-Hong Tsai; Kuan-Yu Liao; James Chien-Mo Li; Ming-Tung Chang; Min-Hsiu Tsai; Chih-Mou Tseng; Hung-Chun Li (ITC, 2011)

Statistical methodology to identify optimal placement of on-chip process monitors for predicting fmax. - Szu-Pang Mu; Wen-Hsiang Chang; Mango C.-T. Chao; Yi-Ming Wang; Ming-Tung Chang; Min-Hsiu Tsai (ICCAD, 2016)

A Fast and Noise Tolerable Binarization Method for Automatic License Plate Recognition in the Open Environment in Taiwan. - Chun-Cheng Peng; Cheng-Jung Tsai; Ting-Yi Chang; Jen-Yuan Yeh; Hsun Dai; Min-Hsiu Tsai (Symmetry, 2020)