Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. - Yu-Chien Chiu; Chun-Yen Chang 002; Hsiao-Hsuan Hsu; Chun-Hu Cheng; Min-Hung Lee (IRPS, 2015)

Steep Switching of In0.18Al0.82N/AlN/GaN MIS-HEMT (Metal Insulator Semiconductor High Electron Mobility Transistors) on Si for Sensor Applications. - Pin-Guang Chen; Kuan-Ting Chen; Ming Tang; Zheng-Ying Wang; Yu-Chen Chou; Min-Hung Lee (Sensors, 2018)

Double Layers Omega FETs with Ferroelectric HfZrO2 for One-Transistor Memory. - Kuan-Ting Chen; C. Lo; Y.-Y. Lin; C.-Y. Chueh; C. Chang; G.-Y. Siang; Y.-J. Tseng; Y.-J. Yang; F.-C. Hsieh; S.-H. Chang; H. Liang; S.-H. Chiang; et al. (IRPS, 2020)

Correlation between Access Polarization and High Endurance ( 1012 cycling) of Ferroelectric and Anti-Ferroelectric HfZrO2. - K.-Y. Hsiang; C.-Y. Liao; Y.-Y. Lin; Z.-F. Lou; C.-Y. Lin; J.-Y. Lee; F.-S. Chang; Z.-X. Li; H.-C. Tseng; C.-C. Wang; W.-C. Ray; T.-H. Hou; et al. (IRPS, 2022)

Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to Array. - H.-L. Chiang; J.-F. Wang; K.-H. Lin; C.-H. Nien; J.-J. Wu; Kuo-Yu Hsiang; C.-P. Chuu; Y.-W. Chen; X. W. Zhang; C. W. Liu; Tahui Wang; C. C. Wang; et al. (VLSI Technology and Circuits, 2022)

Endurance > 1011 Cycling of 3D GAA Nanosheet Ferroelectric FET with Stacked HfZrO2 to Homogenize Corner Field Toward Mitigate Dead Zone for High-Density eNVM. - C.-Y. Liao; K.-Y. Hsiang; Z.-F. Lou; H.-C. Tseng; C.-Y. Lin; Z.-X. Li; F.-C. Hsieh; C. C. Wang; F.-S. Chang; W.-C. Ray; Y.-Y. Tseng; Shu-Tong Chang; et al. (VLSI Technology and Circuits, 2022)

Cryogenic Endurance of Anti-ferroelectric and Ferroelectric Hf1-xZrXO2 for Quantum Computing Applications. - Kuo-Yu Hsiang; Jia-Yang Lee; Z.-F. Lou; F.-S. Chang; Z.-X. Li; C. W. Liu; T.-H. Hou; P. Su; Min-Hung Lee (IRPS, 2023)

First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles. - Yu-Rui Chen; Yi-Chun Liu; Zefu Zhao; Wan-Hsuan Hsieh; Jia-Yang Lee; Chien-Te Tu; Bo-Wei Huang; Jer-Fu Wang; Shee-Jier Chueh; Yifan Xing; Guan-Hua Chen; Hung-Chun Chou; et al. (VLSI Technology and Circuits, 2023)

FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM Operations. - Kuo-Yu Hsiang; J.-Y. Lee; F.-S. Chang; Z.-F. Lou; Z.-X. Li; Z.-H. Li; J.-H. Chen; C. W. Liu; T.-H. Hou; Min-Hung Lee (VLSI Technology and Circuits, 2023)

3D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 10⁹ Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMs. - J.-Y. Lee; F.-S. Chang; Kuo-Yu Hsiang; P.-H. Chen; Z.-F. Luo; Z.-X. Li; J.-H. Tsai; C. W. Liu; Min-Hung Lee (VLSI Technology and Circuits, 2023)