Steep slope transistors: Tunnel FETs and beyond. - Alan C. Seabaugh; Cristobal Alessandri; Mina Asghari Heidarlou; Hua-Min Li; Leitao Liu; Hao Lu 006; Sara Fathipour; Paolo Paletti; Pratyush Pandey; Trond Ytterdal (ESSDERC, 2016)

Supercapacity (>1000 fJF/cm2) charge release in a CVD-grown WSe2 FET incorporating a PEO: CsCI04 side gate. - Mina Asghari Heidarlou; B. Jariwala; Paolo Paletti; S. Rouvimov; J. A. Robinsorr; Susan K. Fullerton-Shirey; Alan C. Seabaugh (DRC, 2018)

Steep Subthreshold Swing Originating from Gate Delay. - Paolo Paletti; Mina Asghari Heidarlou; Karla González-Serrano; Cristobal Alessandri; Alan C. Seabaugh (DRC, 2019)