Top-down-based symmetrical buffered clock routing. - Jin-Tai Yan; Ming-Chien Huang; Zhi-Wei Chen (ACM Great Lakes Symposium on VLSI, 2012)

Efficient assignment of inter-die signals for die-stacking SiP design. - Jin-Tai Yan; Chia-Han Kao; Ming-Chien Huang; Zhi-Wei Chen (ISCAS, 2012)