High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability. - Chiou-Kou Tung; Shao-Hui Shieh; Yu-Cherng Hung; Ming-Chien Tsai (APCCAS, 2006)

An All-Digital High-Precision Built-In Delay Time Measurement Circuit. - Ming-Chien Tsai; Ching-Hwa Cheng; Chiou-Mao Yang (VTS, 2008)

A full-synthesizable high-precision built-in delay time measurement circuit. - Ming-Chien Tsai; Ching-Hwa Cheng (ASP-DAC, 2009)

Asymmetrical Write-assist for single-ended SRAM operation. - Jihi-Yu Lin; Ming-Hsien Tu; Ming-Chien Tsai; Shyh-Jye Jou; Ching-Te Chuang (SoCC, 2009)

Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist. - Ming-Hsien Tu; Jihi-Yu Lin; Ming-Chien Tsai; Shyh-Jye Jou; Ching-Te Chuang (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Design and implementation of dynamic Word-Line pulse write margin monitor for SRAM. - Shao-Cheng Wang; Geng-Cing Lin; Yi-Wei Lin; Ming-Chien Tsai; Yi-Wei Chiu; Shyh-Jye Jou; Ching-Te Chuang; Nan-Chun Lien; Wei-Chiang Shih; Kuen-Di Lee; Jyun-Kai Chu (APCCAS, 2012)

An all-digital bit transistor characterization scheme for CMOS 6T SRAM array. - Geng-Cing Lin; Shao-Cheng Wang; Yi-Wei Lin; Ming-Chien Tsai; Ching-Te Chuang; Shyh-Jye Jou; Nan-Chun Lien; Wei-Chiang Shih; Kuen-Di Lee; Jyun-Kai Chu (ISCAS, 2012)

An all-digital Read Stability and Write Margin characterization scheme for CMOS 6T SRAM array. - Yi-Wei Lin; Ming-Chien Tsai; Hao-I Yang; Geng-Cing Lin; Shao-Cheng Wang; Ching-Te Chuang; Shyh-Jye Jou; Wei Hwang; Nan-Chun Lien; Kuen-Di Lee; Wei-Chiang Shih (VLSI-DAT, 2012)

Embedded SRAM ring oscillator for in-situ measurement of NBTI and PBTI degradation in CMOS 6T SRAM array. - Ming-Chien Tsai; Yi-Wei Lin; Hao-I Yang; Ming-Hsien Tu; Wei-Chiang Shih; Nan-Chun Lien; Kuen-Di Lee; Shyh-Jye Jou; Ching-Te Chuang; Wei Hwang (VLSI-DAT, 2012)

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing. - Ming-Hsien Tu; Jihi-Yu Lin; Ming-Chien Tsai; Chien-Yu Lu; Yuh-Jiun Lin; Meng-Hsueh Wang; Huan-Shun Huang; Kuen-Di Lee; Wei-Chiang Shih; Shyh-Jye Jou; Ching-Te Chuang (IEEE J. Solid State Circuits, 2012)