Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign. - Ren-Jie Lee; Ming-Fang Lai; Hung-Ming Chen (ASP-DAC, 2007)

Cumulative electrostatic discharge induced degradation of power-rail ESD clamp device in high-voltage CMOS/DMOS technologies. - Chung-Ti Hsu; Shu-Chuan Chen; Yen-Hsien Chen; Yu-Ti Su; Ming-Fang Lai; Che-Hung Chen; Po-An Chen (APCCAS, 2008)

An Implementation of Performance-Driven Block and I/O Placement for Chip-Package Codesign. - Ming-Fang Lai; Hung-Ming Chen (ISQED, 2008)