MRAM Defect Analysis and Fault Modeli. - Chin-Lung Su; Rei-Fu Huang; Cheng-Wen Wu; Chien-Chung Hung; Ming-Jer Kao; Yeong-Jar Chang; Wen Ching Wu (ITC, 2004)

Testing MRAM for Write Disturbance Fault. - Chin-Lung Su; Chih-Wea Tsai; Cheng-Wen Wu; Chien-Chung Hung; Young-Shying Chen; Ming-Jer Kao (ITC, 2006)

Diagnosis for MRAM write disturbance fault. - Chin-Lung Su; Chih-Wea Tsai; Cheng-Wen Wu; Ji-Jan Chen; Wen Ching Wu; Chien-Chung Hung; Ming-Jer Kao (ITC, 2007)

Write Disturbance Modeling and Testing for MRAM. - Chin-Lung Su; Chih-Wea Tsai; Cheng-Wen Wu; Chien-Chung Hung; Young-Shying Chen; Ding-Yeong Wang; Yuan-Jen Lee; Ming-Jer Kao (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Low power design of phase-change memory based on a comprehensive model. - Meng-Hsueh Chiang; Yi-Bo Liao; Jun-Tin Lin; Wei-Chou Hsu; Chu Yu; Pei-Chia Chiang; Y.-Y. Hsu; W.-H. Liu; Shyh-Shyuan Sheu; Keng-Li Su; Ming-Jer Kao; Ming-Jinn Tsai (IET Comput. Digit. Tech., 2010)

Diagnosis of MRAM Write Disturbance Fault. - Chin-Lung Su; Chih-Wea Tsai; Ching-Yi Chen; Wan-Yu Lo; Cheng-Wen Wu; Ji-Jan Chen; Wen Ching Wu; Chien-Chung Hung; Ming-Jer Kao (IEEE Trans. Very Large Scale Integr. Syst., 2010)

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. - Shyh-Shyuan Sheu; Meng-Fan Chang; Ku-Feng Lin; Che-Wei Wu; Yu-Sheng Chen; Pi-Feng Chiu; Chia-Chen Kuo; Yih-Shan Yang; Pei-Chia Chiang; Wen-Pin Lin; Che-He Lin; Heng-Yuan Lee; et al. (ISSCC, 2011)

Challenges of Cu CMP of TSVs and RDLs fabricated from the backside of a thin wafer. - Jui-Chin Chen; John H. Lau; Tzu-Chien Hsu; Chien-Chou Chen; Pei-Jer Tzeng; Po-Chih Chang; Chun-Hsien Chien; Yiu-Hsiang Chang; Shang-Chun Chen; Yu-Chen Hsin; Sue-Chen Liao; Cha-Hsin Lin; et al. (3DIC, 2013)

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes. - Meng-Fan Chang; Shyh-Shyuan Sheu; Ku-Feng Lin; Che-Wei Wu; Chia-Chen Kuo; Pi-Feng Chiu; Yih-Shan Yang; Yu-Sheng Chen; Heng-Yuan Lee; Chen-Hsin Lien; Frederick T. Chen; Keng-Li Su; et al. (IEEE J. Solid State Circuits, 2013)

A nonvolatile look-up table using ReRAM for reconfigurable logic. - Wen-Pin Lin; Shyh-Shyuan Sheu; Chia-Chen Kuo; Pei-Ling Tseng; Meng-Fan Chang; Keng-Li Su; Chih-Sheng Lin; Kan-Hsueh Tsai; Sih-Han Lee; Szu-Chieh Liu; Yu-Sheng Chen; Heng-Yuan Lee; et al. (A-SSCC, 2014)

ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing. - Li-Yue Huang; Meng-Fan Chang; Ching-Hao Chuang; Chia-Chen Kuo; Chien-Fu Chen; Geng-Hau Yang; Hsiang-Jen Tsai; Tien-Fu Chen; Shyh-Shyuan Sheu; Keng-Li Su; Frederick T. Chen; Tzu-Kun Ku; et al. (VLSIC, 2014)

Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications. - Meng-Fan Chang; Shu-Meng Yang; Chia-Chen Kuo; Ting-Chin Yang; Che-Ju Yeh; Tun-Fei Chien; Li-Yue Huang; Shyh-Shyuan Sheu; Pei-Ling Tseng; Yu-Sheng Chen; Frederick T. Chen; Tzu-Kun Ku; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2015)