Low power design of phase-change memory based on a comprehensive model. - Meng-Hsueh Chiang; Yi-Bo Liao; Jun-Tin Lin; Wei-Chou Hsu; Chu Yu; Pei-Chia Chiang; Y.-Y. Hsu; W.-H. Liu; Shyh-Shyuan Sheu; Keng-Li Su; Ming-Jer Kao; Ming-Jinn Tsai (IET Comput. Digit. Tech., 2010)

A process for high yield and high performance carbon nanotube field effect transistors. - Tseng-Chin Lee; Bing-Yue Tsui; Pei-Jer Tzeng; Ching-Chiun Wang; Ming-Jinn Tsai (Microelectron. Reliab., 2010)

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. - Shyh-Shyuan Sheu; Meng-Fan Chang; Ku-Feng Lin; Che-Wei Wu; Yu-Sheng Chen; Pi-Feng Chiu; Chia-Chen Kuo; Yih-Shan Yang; Pei-Chia Chiang; Wen-Pin Lin; Che-He Lin; Heng-Yuan Lee; et al. (ISSCC, 2011)

Resistance switching for RRAM applications. - Frederick T. Chen; Heng-Yuan Lee; Yu-Sheng Chen; Yenya Hsu; Lijie Zhang; Pang-Shiu Chen; Weisu Chen; Peiyi Gu; Wenhsing Liu; Sumin Wang; Chen-Han Tsai; Shyh-Shyuan Sheu; et al. (Sci. China Inf. Sci., 2011)

Fast-Write Resistive RAM (RRAM) for Embedded Applications. - Shyh-Shyuan Sheu; Kuo-Hsing Cheng; Meng-Fan Chang; Pei-Chia Chiang; Wen-Pin Lin; Heng-Yuan Lee; Pang-Shiu Chen; Yu-Sheng Chen; Frederick T. Chen; Ming-Jinn Tsai (IEEE Des. Test Comput., 2011)

A 50 ns Verify Speed in Resistive Random Access Memory by Using a Write Resistance Tracking Circuit. - Shyh-Shyuan Sheu; Kuo-Hsing Cheng; Yu-Sheng Chen; Pang-Shiu Chen; Ming-Jinn Tsai; Yu-Lung Lo (IEICE Trans. Electron., 2012)

Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications. - Pi-Feng Chiu; Meng-Fan Chang; Che-Wei Wu; Ching-Hao Chuang; Shyh-Shyuan Sheu; Yu-Sheng Chen; Ming-Jinn Tsai (IEEE J. Solid State Circuits, 2012)

Metal-Oxide RRAM. - H.-S. Philip Wong; Heng-Yuan Lee; Shimeng Yu; Yu-Sheng Chen; Yi Wu 016; Pang-Shiu Chen; Byoungil Lee; Frederick T. Chen; Ming-Jinn Tsai (Proc. IEEE, 2012)

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes. - Meng-Fan Chang; Shyh-Shyuan Sheu; Ku-Feng Lin; Che-Wei Wu; Chia-Chen Kuo; Pi-Feng Chiu; Yih-Shan Yang; Yu-Sheng Chen; Heng-Yuan Lee; Chen-Hsin Lien; Frederick T. Chen; Keng-Li Su; et al. (IEEE J. Solid State Circuits, 2013)

A nonvolatile look-up table using ReRAM for reconfigurable logic. - Wen-Pin Lin; Shyh-Shyuan Sheu; Chia-Chen Kuo; Pei-Ling Tseng; Meng-Fan Chang; Keng-Li Su; Chih-Sheng Lin; Kan-Hsueh Tsai; Sih-Han Lee; Szu-Chieh Liu; Yu-Sheng Chen; Heng-Yuan Lee; et al. (A-SSCC, 2014)

ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing. - Li-Yue Huang; Meng-Fan Chang; Ching-Hao Chuang; Chia-Chen Kuo; Chien-Fu Chen; Geng-Hau Yang; Hsiang-Jen Tsai; Tien-Fu Chen; Shyh-Shyuan Sheu; Keng-Li Su; Frederick T. Chen; Tzu-Kun Ku; et al. (VLSIC, 2014)

Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme. - Meng-Fan Chang; Chia-Chen Kuo; Shyh-Shyuan Sheu; Chorng-Jung Lin; Ya-Chin King; Frederick T. Chen; Tzu-Kun Ku; Ming-Jinn Tsai; Jui-Jen Wu; Yu-Der Chih (IEEE J. Solid State Circuits, 2014)

Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications. - Meng-Fan Chang; Shu-Meng Yang; Chia-Chen Kuo; Ting-Chin Yang; Che-Ju Yeh; Tun-Fei Chien; Li-Yue Huang; Shyh-Shyuan Sheu; Pei-Ling Tseng; Yu-Sheng Chen; Frederick T. Chen; Tzu-Kun Ku; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. - Tsai-Kan Chien; Lih-Yih Chiou; Chieh-Wen Cheng; Shyh-Shyuan Sheu; Pei-Hua Wang; Ming-Jinn Tsai; Chih-I Wu (APCCAS, 2016)

A low store energy and robust ReRAM-based flip-flop for normally off microprocessors. - Tsai-Kan Chien; Lih-Yih Chiou; Yao-Chun Chuang; Shyh-Shyuan Sheu; Heng-Yuan Li; Pei-Hua Wang; Tzu-Kun Ku; Ming-Jinn Tsai; Chih-I Wu (ISCAS, 2016)

Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications. - Tsai-Kan Chien; Lih-Yih Chiou; Shyh-Shyuan Sheu; Jing-Cian Lin; Chang-Chia Lee; Tzu-Kun Ku; Ming-Jinn Tsai; Chih-I Wu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches. - Tsai-Kan Chien; Lih-Yih Chiou; Yi-Sung Tsou; Shyh-Shyuan Sheu; Pei-Hua Wang; Ming-Jinn Tsai; Chih-I Wu (ISLPED, 2017)