Hybrid Nanoelectronics: Future of Computer Technology. - Wei Wang 003; Ming Liu 022; Andrew Hsu (J. Comput. Sci. Technol., 2006)

Modeling and simulation development of electron beam resist based on cellular automata. - Ling Li 013; Shibing Long; Congshun Wang; Wengang Wu; Yilong Hao; Ming Liu 022 (Microelectron. J., 2006)

Fault Tolerance Circuit for AM-OLED. - Dayong Li; Ming Liu 022; Wei Wang 003 (ISCAS, 2007)

Analyzing mixed carbon nanotube bundles: A current density study. - Liwei Shang; Ming Liu 022; Sansiri Tanachutiwat; Wei Wang 003 (ISCAS, 2008)

rFGA: CMOS-nano hybrid FPGA using RRAM components. - Ming Liu 022; Wei Wang 003 (NANOARCH, 2008)

FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications. - Ming Liu 022; Hua Yu; Wei Wang 003 (NanoNet, 2008)

FPGA based on integration of carbon nanorelays and CMOS devices. - Ming Liu 022; Haigang Yang; Sansiri Tanachutiwat; Wei Wang 003 (NANOARCH, 2009)

Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices. - Ming Liu 022; Haigang Yang; Sansiri Tanachutiwat; Wei Wang 003 (NanoNet, 2009)

A low power single ended input differential output low noise amplifier for L1/L2 band. - Yonghui Ji; Ming Liu 022; Qin Wang; Shibing Long; Zhaoan Yu; Manhong Zhang (ISCAS, 2010)

Formation and annihilation of Cu conductive filament in the nonpolar resistive switching Cu/ZrO2: Cu/Pt ReRAM. - Ming Liu 022; Qi Liu 010; Shibing Long; Weihua Guan (ISCAS, 2010)

3D Integration of CMOL Structures for FPGA Applications. - Zine Abid; Ming Liu 022; Wei Wang 003 (IEEE Trans. Computers, 2011)

FPGA Based on Integration of CMOS and RRAM. - Sansiri Tanachutiwat; Ming Liu 022; Wei Wang 003 (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Impact of P/E cycling on read current fluctuation of NOR Flash memory cell: A microscopic perspective based on low frequency noise analysis. - Xiaonan Yang; Jing Liu 035; Zhiwei Zheng; Yan Wang; Dandan Jiang; Shengfen Chiu; Hanming Wu; Ming Liu 022 (IRPS, 2015)

A 25Gb/s low-noise optical receiver in 0.13 μm SiGe BiCMOS. - Dan Li 011; Zimou Zhang; Yang Xie; Ming Liu 022; Qian Yang; Li Geng (ICECS, 2016)

Study of total ionizing dose induced read bit errors in magneto-resistive random access memory. - Haohao Zhang; Jinshun Bi; Haibin Wang; Hongyang Hu; Jin Li; Lanlong Ji; Ming Liu 022 (Microelectron. Reliab., 2016)

A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects. - Nan Qi 002; Yuhang Kang; Qipeng Lin; Jianxu Ma; Jingbo Shi; Bozhi Yin; Chang Liu; Rui Bai 001; Shang Hu; Juncheng Wang; Jiangbing Du; Lin Ma 008; et al. (A-SSCC, 2017)

A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range. - Feng Zhang 014; Dongyu Fan; Yuan Duan; Jin Li; Cong Fang 002; Yun Li; Xiaowei Han; Lan Dai; Cheng-Ying Chen; Jinshun Bi; Ming Liu 022; Meng-Fan Chang (A-SSCC, 2017)

A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. - Xiaowei Han; Qian Jia; Hongbin Sun 001; Longfei Wang; Huaqiang Wu; Yimao Cai; Feng Zhang 014; Yongyi Xie; Fangxu Dong; Xiaoguang Wang 015; Xiaofei Xue; Li Pang; et al. (CICC, 2017)

Total ionizing dose effects and annealing behaviors of HfO2-based MOS capacitor. - Yannan Xu; Jinshun Bi; Gaobo Xu; Kai Xi; Bo Li 051; Ming Liu 022 (Sci. China Inf. Sci., 2017)

Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F2 and K-means Clustering for Power Reduction. - Keji Zhou; Xiaoyong Xue; Jianguo Yang; Xiaoxin Xu; Hangbing Lv; Mingyu Wang 001; Ming-e Jing; Wenjun Liu; Xiaoyang Zeng; Steve S. Chung; Jing Li; Ming Liu 022 (A-SSCC, 2018)

Low-Noise High-Linearity 56Gb/s PAM-4 Optical Receiver in 45nm SOI CMOS. - Yang Xie; Dan Li 011; Yiqun Liu 011; Ming Liu 022; Yihua Zhang; Xiaoli Wang; Li Geng (ISCAS, 2018)

Resistive Switching Devices: Mechanism, Performance and Integration. - Ming Liu 022; Qi Liu 010; Hangbing Lv; Shibing Long (Handbook of Memristor Networks, 2019)

A High Reliability 500 µW Resistance-to-Digital Interface Circuit for SnO2 Gas Sensor IoT Applications. - Jianguo Yang; Xiaowen Li; Qingting Ding; Xiaoyong Xue; Xiaoxin Xu; Qing Luo; Hangbing Lv; Ming Liu 022 (ASICON, 2019)

A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key. - Xiaoyong Xue; Jianguo Yang; Yuejun Zhang; Mingyu Wang 001; Hangbing Lv; Xiaoyang Zeng; Ming Liu 022 (A-SSCC, 2019)

A 6.78MHz 92.3%-Peak-Efficiency Single-Stage Wireless Charger with CC-CV Charging and On-Chip Bootstrapping Techniques. - Lin Cheng 001; Xinyuan Ge; Wai Chiu Ng; Wing-Hung Ki; Jiawei Zheng; Tsz Fai Kwok; Chi-Ying Tsui; Ming Liu 022 (VLSI Circuits, 2019)

Total ionizing dose effects on graphene-based charge-trapping memory. - Kai Xi; Jinshun Bi; Sandip Majumdar; Bo Li 051; Jing Liu 035; Yannan Xu; Ming Liu 022 (Sci. China Inf. Sci., 2019)

A Novel General Compact Model Approach for 7nm Technology Node Circuit Optimization from Device Perspective and Beyond. - Qiang Huo; Zhenhua Wu; Weixing Huang; Xingsheng Wang; Geyu Tang; Jiaxin Yao; Yongpan Liu; Feng Zhang 014; Ling Li 013; Ming Liu 022 (CoRR, 2019)

A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique. - Jiahao Yin; Chunmeng Dou; Danian Dong; Jie Yu 027; Xiaoxin Xu; Qing Luo; Tiancheng Gong; Lu Tai; Peng Yuan; Xiaoyong Xue; Ming Liu 022; Hangbing Lv (IEICE Electron. Express, 2019)

Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication. - Dan Li 011; Ming Liu 022; Shengwei Gao; Yongjun Shi; Yihua Zhang; Zhiyong Li 014; Patrick Yin Chiang; Franco Maloberti; Li Geng (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications. - Yiming Wang; Yun Li; Haihua Shen; Dongyu Fan; Wei Wang 003; Ling Li 013; Qi Liu 010; Feng Zhang 014; Xinghua Wang; Meng-Fan Chang; Ming Liu 022 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Design of a Single-Stage Wireless Charger with 92.3%-Peak-Efficiency for Portable Devices Applications. - Lin Cheng 001; Xinyuan Ge; Wai Chiu Ng; Wing-Hung Ki; Jiawei Zheng; Tsz Fai Kwok; Chi-Ying Tsui; Ming Liu 022 (ASP-DAC, 2020)

A 28nm 1.5Mb Embedded 1T2R RRAM with 14.8 Mb/mm2 using Sneaking Current Suppression and Compensation Techniques. - Jianguo Yang; Xiaoyong Xue; Xiaoxin Xu; Hangbing Lv; Feng Zhang 014; Xiaoyang Zeng; Meng-Fan Chang; Ming Liu 022 (VLSI Circuits, 2020)

A 6.78-MHz Single-Stage Wireless Charger With Constant-Current Constant-Voltage Charging Technique. - Lin Cheng 001; Xinyuan Ge; Wai Chiu Ng; Wing-Hung Ki; Jiawei Zheng; Tsz Fai Kwok; Chi-Ying Tsui; Ming Liu 022 (IEEE J. Solid State Circuits, 2020)

A Low Power 4T2C nvSRAM With Dynamic Current Compensation Operation Scheme. - Chao Liu; Jianguo Yang; Pengfei Jiang; Qiao Wang; Donglin Zhang; Tiancheng Gong; Qingting Ding; Yuling Zhao; Qing Luo; Xiaoyong Xue; Hangbing Lv; Ming Liu 022 (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory. - Linfang Wang; Wang Ye; Junjie An; Chunmeng Dou; Qi Liu 010; Meng-Fan Chang; Ming Liu 022 (ISCAS, 2021)

14.6 A 76-to-81GHz 2×8 FMCW MIMO Radar Transceiver with Fast Chirp Generation and Multi-Feed Antenna-in-Package Array. - Zongming Duan; Bowen Wu; Chuanming Zhu; Yan Wang; Weiwei Jin; Ying Liu; Yanhui Wu; Tao Zhang; Ming Liu 022; Bingfei Dou; Bingbing Liao; Wei Lv; et al. (ISSCC, 2021)

A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mW/mm2 Power Density. - Dongfang Pan; Guolong Li; Fangting Miao; Biao Deng; Junying Wei; Daquan Yu; Ming Liu 022; Lin Cheng 001 (ISSCC, 2021)

24.2 A 14nm-FinFET 1Mb Embedded 1T1R RRAM with a 0.022µ m2 Cell Size Using Self-Adaptive Delayed Termination and Multi-Cell Reference. - Jianguo Yang; Xiaoyong Xue; Xiaoxin Xu; Qiao Wang; Haijun Jiang; Jie Yu 027; Danian Dong; Feng Zhang 014; Hangbing Lv; Ming Liu 022 (ISSCC, 2021)

Investigation of weight updating modes on oxide-based resistive switching memory synapse towards neuromorphic computing applications. - Qingting Ding; Tiancheng Gong; Jie Yu 027; Xiaoxin Xu; Xiaoyan Li; Hangbing Lv; Jianguo Yang; Qing Luo; Peng Yuan; Feng Zhang 014; Ming Liu 022 (Sci. China Inf. Sci., 2021)

Simulations of single event effects on the ferroelectric capacitor-based non-volatile SRAM design. - Jianjian Wang; Jinshun Bi; Gang Liu; Hua Bai; Kai Xi; Bo Li 051; Sandip Majumdar; Lanlong Ji; Ming Liu 022; Zhangang Zhang (Sci. China Inf. Sci., 2021)

Echo state graph neural networks with analogue random resistor arrays. - Shaocong Wang; Yi Li 049; Dingchen Wang; Woyu Zhang; Xi Chen; Danian Dong; Songqi Wang; Xumeng Zhang; Peng Lin; Claudio Gallicchio; Xiaoxin Xu; Qi Liu 010; et al. (CoRR, 2021)

High-Density 3-D Stackable Crossbar 2D2R nvTCAM With Low-Power Intelligent Search for Fast Packet Forwarding in 5G Applications. - Keji Zhou; Xiaoyong Xue; Jianguo Yang; Xiaoxin Xu; Hangbing Lv; Ming-e Jing; Jing Li; Xiaoyang Zeng; Ming Liu 022 (IEEE J. Solid State Circuits, 2021)

A low-power twiddle factor addressing architecture for split-radix FFT processor. - Ming Liu 022; Ping Zhao; Tianshu Wu; Keshab K. Parhi; Xiaoyang Zeng; Yun Chen 001 (Microelectron. J., 2021)

An LUT-Based Multiplier Array for Systolic Array-Based Convolutional Neural Network Accelerator. - Ming Liu 022; Yifan He 002; Hailong Jiao (APCCAS, 2022)

COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning. - Haozhe Zhu; Bo Jiao; Jinshan Zhang 006; Xinru Jia; Yunzhengmao Wang; Tianchan Guan; Shengcheng Wang; Dimin Niu; Hongzhong Zheng; Chixiao Chen; Mingyu Wang 001; Lihua Zhang 002; et al. (ISSCC, 2022)

Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high Gm, max of 559 µS/µm at VDS=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec. - Kaifei Chen; Jiebin Niu; Guanhua Yang; Menggan Liu; Wendong Lu; Fuxi Liao; Kailiang Huang; Xinlv Duan; Congyan Lu; Jiawei Wang; Lingfei Wang; Mengmeng Li; et al. (VLSI Technology and Circuits, 2022)

Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability and BTI Impact on Device and Capacitor-less DRAM Retention Reliability. - Jingrui Guo; Ying Sun; Lingfei Wang; Xinlv Duan; Kailiang Huang; Zhaogui Wang; Junxiao Feng; Qian Chen; Shijie Huang; Lihua Xu; Di Geng; Guangfan Jiao; et al. (VLSI Technology and Circuits, 2022)

Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application. - Kailiang Huang; Xinlv Duan; Junxiao Feng; Ying Sun; Congyan Lu; Chuanke Chen; Guangfan Jiao; Xinpeng Lin; Jinhai Shao; Shihui Yin; Jiazhen Sheng; Zhaogui Wang; et al. (VLSI Technology and Circuits, 2022)

First Demonstration of High-Sensitivity (NEP 1fW1/2) Back-Illuminated Active-Matrix Deep UV Image Sensor by Monolithic Integration of Ga2O3 Photodetectors and Oxide Thin-Film-Transistors. - Yuan Qin; Congyan Lu; Zhaoan Yu; Zhihong Yao; Feihong Wu; Danian Dong; Xiaolong Zhao; Guangwei Xu; Yuhao Zhang; Shibing Long; Ling Li 013; Ming Liu 022 (VLSI Technology and Circuits, 2022)

3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm2) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing. - Wenxuan Sun; Woyu Zhang; Jie Yu 027; Yi Li 049; Zeyu Guo 002; Jinru Lai; Danian Dong; Xu Zheng; Fei Wang; Shaoyang Fan; Xiaoxin Xu; Dashan Shang; et al. (VLSI Technology and Circuits, 2022)

Few-shot graph learning with robust and energy-efficient memory-augmented graph neural network (MAGNN) based on homogeneous computing-in-memory. - Woyu Zhang; Shaocong Wang; Yi Li 049; Xiaoxin Xu; Danian Dong; Nanjia Jiang; Fei Wang; Zeyu Guo 002; Renrui Fang; Chunmeng Dou; Kai Ni; Zhongrui Wang; et al. (VLSI Technology and Circuits, 2022)

STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. - Jinshan Yue; Yongpan Liu; Zhe Yuan; Xiaoyu Feng; Yifan He 002; Wenyu Sun; Zhixiao Zhang; Xin Si; Ruhui Liu; Zi Wang; Meng-Fan Chang; Chunmeng Dou; et al. (IEEE J. Solid State Circuits, 2022)

A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine. - Shiwei Liu 002; Peizhe Li; Jinshan Zhang 006; Yunzhengmao Wang; Haozhe Zhu; Wenning Jiang; Shan Tang; Chixiao Chen; Qi Liu 010; Ming Liu 022 (ISSCC, 2023)

A 9Mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. - Jianguo Yang; Qing Luo; Xiaoyong Xue; Haijun Jiang; Qiqiao Wu; Zhongze Han; Yue Cao; Yongkang Han; Chunmeng Dou; Hangbing Lv; Qi Liu 010; Ming Liu 022 (ISSCC, 2023)

A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. - Jinshan Yue; Chaojie He; Zi Wang; Zhaori Cong; Yifan He 002; Mufeng Zhou; Wenyu Sun; Xueqing Li 002; Chunmeng Dou; Feng Zhang 014; Huazhong Yang; Yongpan Liu; et al. (ISSCC, 2023)

16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (>5000) and Ultra-low Leakage Current ( pA) Self-Selective Cells. - Yaxin Ding; Jianguo Yang; Yu Liu; Jianfeng Gao 005; Yuan Wang; Pengfei Jiang; Shuxian Lv; Yuting Chen; Boping Wang; Wei Wei; Tiancheng Gong; Kanhao Xue; et al. (VLSI Technology and Circuits, 2023)

First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip. - Tiancheng Gong; Lihua Xu; Wei Wei; Pengfei Jiang; Peng Yuan; Bowen Nie; Yuanquan Huang; Yuan Wang; Yang Yang; Jianfeng Gao 005; Junfeng Li; Jun Luo; et al. (VLSI Technology and Circuits, 2023)

A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. - Jinshan Yue; Mingtao Zhan; Zi Wang; Yifan He 002; Yaolei Li; Songming Yu; Wenyu Sun; Lu Jie 001; Chunmeng Dou; Xueqing Li 002; Nan Sun 001; Huazhong Yang; et al. (VLSI Technology and Circuits, 2023)

Resistive memory-based zero-shot liquid state machine for multimodal event data learning. - Ning Lin; Shaocong Wang; Yi Li 049; Bo Wang 153; Shuhui Shi; Yangu He; Woyu Zhang; Yifei Yu; Yue Zhang 011; Xiaojuan Qi 001; Xiaoming Chen 003; Hao Jiang 024; et al. (CoRR, 2023)

Pruning random resistive memory for optimizing analogue AI. - Yi Li 049; Songqi Wang; Yaping Zhao; Shaocong Wang; Woyu Zhang; Yangu He; Ning Lin; Binbin Cui; Xi Chen; Shiming Zhang; Hao Jiang 024; Peng Lin; et al. (CoRR, 2023)

Random resistive memory-based deep extreme point learning machine for unified visual processing. - Shaocong Wang; Yizhao Gao 002; Yi Li 049; Woyu Zhang; Yifei Yu; Bo Wang 153; Ning Lin; Hegan Chen; Yue Zhang 011; Yang Jiang; Dingchen Wang; Jia Chen 032; et al. (CoRR, 2023)

Echo state graph neural networks with analogue random resistive memory arrays. - Shaocong Wang; Yi Li 049; Dingchen Wang; Woyu Zhang; Xi Chen; Danian Dong; Songqi Wang; Xumeng Zhang; Peng Lin; Claudio Gallicchio; Xiaoxin Xu; Qi Liu 010; et al. (Nat. Mac. Intell., 2023)

A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier. - Wenning Jiang; Yan Zhu 001; Chixiao Chen; Hao Xu 005; Qi Liu 010; Ming Liu 022; Rui Paulo Martins; Chi-Hang Chan (IEEE J. Solid State Circuits, 2023)

A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference. - Wang Ye; Linfang Wang; Zhidao Zhou; Junjie An; Weizeng Li; Hanghang Gao; Zhi Li 062; Jinshan Yue; Hongyang Hu; Xiaoxin Xu; Jianguo Yang; Jing Liu 035; et al. (IEEE J. Solid State Circuits, 2023)

CNN Accelerator at the Edge With Adaptive Zero Skipping and Sparsity-Driven Data Flow. - Ming Liu 022; Changchun Zhou 001; Siyuan Qiu; Yifan He 002; Hailong Jiao (IEEE Trans. Circuits Syst. Video Technol., 2023)

A 32×32 SPAD LiDAR Sensor with In-pixel Spatial-temporal Coincidence and Per-SPAD Pulse Delay for Resolution-lossless Imaging. - Bu Chen; Zhangcheng Huang 001; Jingyi Wang; Hongyang Shang; Hankun Lv; Qi Liu 010; Ming Liu 022 (A-SSCC, 2024)

A 32×32 Flash LiDAR SPAD Sensor with Up-to-1kfps Motional Target Detection by Threshold-adaptive 2D Dynamic Vision. - Jingyi Wang; Zhangcheng Huang 001; Bu Chen; Hongyang Shang; Jiapei Zheng; Hankun Lv; Chixiao Chen; Qi Liu 010; Ming Liu 022 (CICC, 2024)

High-efficient and Comprehensive Modeling of MFIM Ferroelectric Tunnel Junctions for Non-volatile/Volatile Applications. - Yu Li; Hao Jiang 024; Jie Yu 027; Xuanyu Zhao; Xiaodong Wang; Qihan Liu; Yingfen Wei; Qi Liu 010; Ming Liu 022 (IMW, 2024)

34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process. - Linfang Wang; Weizeng Li; Zhidao Zhou; Hanghang Gao; Zhi Li 062; Wang Ye; Hongyang Hu; Jing Liu 035; Jinshan Yue; Jianguo Yang; Qing Luo; Chunmeng Dou; et al. (ISSCC, 2024)

A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications. - Zhuoyu Dai; Shengzhe Yan; Zhaori Cong; Zeyu Guo 002; Yifan He 002; Wenyu Sun; Chunmeng Dou; Feng Zhang 014; Jinshan Yue; Yongpan Liu; Ming Liu 022 (VLSI Technology and Circuits, 2024)

First Demonstration of Monolithic Three-Dimensional Integration of Ultra-High Density Hybrid IGZO/Si SRAM and IGZO 2T0C DRAM Achieving Record-Low Latency (5000s). - Menggan Liu; Zhi Li 062; Wendong Lu; Kaifei Chen; Jiebin Niu; Fuxi Liao; Zijing Wu; Congyan Lu; Weizeng Li; Di Geng; Nianduan Lu; Chunmeng Dou; et al. (VLSI Technology and Circuits, 2024)

Ge-doped In2O3: First Demonstration of Utlizing Ge as Oxygen Vacancy Consumer to Break the Mobility/Reliability Tradeoff for High Performance Oxide TFTs. - Jiayi Wang; Ziheng Bai; Kuo Zhang; Zhicheng Wu; Di Geng; Yang Xu; Nannan You; Yuxuan Li; Guanhua Yang; Ling Li 013; Shengkai Wang; Ming Liu 022 (VLSI Technology and Circuits, 2024)

Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model. - Jichang Yang; Hegan Chen; Jia Chen 032; Songqi Wang; Shaocong Wang; Yifei Yu; Xi Chen; Bo Wang 153; Xinyuan Zhang 008; Binbin Cui; Yi Li 049; Ning Lin; et al. (CoRR, 2024)

Efficient and accurate neural field reconstruction using resistive memory. - Yifei Yu; Shaocong Wang; Woyu Zhang; Xinyuan Zhang 008; Xiuzhe Wu; Yangu He; Jichang Yang; Yue Zhang 011; Ning Lin; Bo Wang 153; Xi Chen; Songqi Wang; et al. (CoRR, 2024)

Continuous-Time Digital Twin with Analogue Memristive Neural Ordinary Differential Equation Solver. - Hegan Chen; Jichang Yang; Jia Chen 032; Songqi Wang; Shaocong Wang; Dingchen Wang; Xinyu Tian; Yifei Yu; Xi Chen; Yinan Lin; Yangu He; Xiaoshan Wu; et al. (CoRR, 2024)

Dynamic neural network with memristive CIM and CAM for 2D and 3D vision. - Yue Zhang 011; Woyu Zhang; Shaocong Wang; Ning Lin; Yifei Yu; Yangu He; Bo Wang 153; Hao Jiang 024; Peng Lin; Xiaoxin Xu; Xiaojuan Qi 001; Zhongrui Wang; et al. (CoRR, 2024)

Binary-Stochasticity-Enabled Highly Efficient Neuromorphic Deep Learning Achieves Better-than-Software Accuracy. - Yang Li 203; Wei Wang 209; Ming Wang; Chunmeng Dou; Zhengyu Ma; Huihui Zhou; Peng Zhang 077; Nicola Lepri; Xumeng Zhang; Qing Luo; Xiaoxin Xu; Guanhua Yang; et al. (Adv. Intell. Syst., 2024)

A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. - Qiqiao Wu; Yue Cao; Qing Luo; Haijun Jiang; Zhongze Han; Yongkang Han; Chunmeng Dou; Hangbing Lv; Qi Liu 010; Jianguo Yang; Ming Liu 022 (IEEE J. Solid State Circuits, 2024)

An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. - Jinshan Yue; Yongpan Liu; Xiaoyu Feng; Yifan He 002; Jingyu Wang 004; Zhe Yuan; Mingtao Zhan; Jiaxin Liu; Jian-Wei Su; Yen-Lin Chung; Ping-Chun Wu; Li-Yang Hong; et al. (IEEE J. Solid State Circuits, 2024)

A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. - Shengzhe Yan; Jinshan Yue; Chaojie He; Zi Wang; Zhaori Cong; Yifan He 002; Mufeng Zhou; Wenyu Sun; Xueqing Li 002; Chunmeng Dou; Feng Zhang 014; Huazhong Yang; et al. (IEEE J. Solid State Circuits, 2024)

Hardware Implementation of Next Generation Reservoir Computing with RRAM-Based Hybrid Digital-Analog System. - Danian Dong; Woyu Zhang; Yuanlu Xie; Jinshan Yue; Kuan Ren; Hongjian Huang; Xu Zheng; Wenxuan Sun; Jinru Lai; Shaoyang Fan; Hongzhou Wang; Zhaoan Yu; et al. (Adv. Intell. Syst., 2024)

SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros. - Mengjie Li; Haozhe Zhu; Siqi He; Hongyi Zhang; Jie Liao; Danfeng Zhai; Chixiao Chen; Qi Liu 010; Xiaoyang Zeng; Ninghui Sun; Ming Liu 022 (IEEE J. Solid State Circuits, 2024)

A PMOS-Based Deep Cryogenic CMOS Temperature Sensor Achieving a Range from 10K to 410K with a Relative Inaccuracy of 0.5% (3σ). - Xingyu Qi; Yingzhe Sha; Xufeng Kou; Xiaoyong Xue; Peng Wang; Zhangcheng Huang 001; Qi Liu 010; Ming Liu 022 (CICC, 2025)

An Energy-Efficient High-Utilization Hardware Architecture for Attention Mechanism in Transformer using Balanced Systolic Array and Multi-Row Interleaved Operation Ordering. - Haiyang Zhou; Hongyang Hu; Jinshan Yue; Hanghang Gao; Yuanlu Xie; Xiaoxin Xu; Chunmeng Dou; Ming Liu 022 (DAC, 2025)

EIGEN: Enabling Efficient 3DIC Interconnect with Heterogeneous Dual-Layer Network-on-Active-Interposer. - Siyao Jia; Bo Jiao; Haozhe Zhu; Chixiao Chen; Qi Liu 010; Ming Liu 022 (HPCA, 2025)

37.4 SHINSAI: A 586mm2 Reusable Active TSV Interposer with Programmable Interconnect Fabric and 512Mb 3D Underdeck Memory. - Bo Jiao; Haozhe Zhu; Yuman Zeng; Yongjiang Li; Jie Liao; Siyao Jia; Mochen Tian; Zexing Chen; Jundong Zhu; Dexin Wen; Yan Wang; Yu Wang 046; et al. (ISSCC, 2025)

A monolithic 3D IGZO-RRAM-SRAM-integrated architecture for robust and efficient compute-in-memory enabling equivalent-ideal device metrics. - Shengzhe Yan; Zhaori Cong; Zi Wang; Zhuoyu Dai; Zeyu Guo 002; Zhihang Qian; Xufan Li; Xu Zheng; Chuanke Chen; Nianduan Lu; Chunmeng Dou; Guanhua Yang; et al. (Sci. China Inf. Sci., 2025)

Resistive memory-based zero-shot liquid state machine for multimodal event data learning. - Ning Lin; Shaocong Wang; Yi Li 049; Bo Wang 153; Shuhui Shi; Yangu He; Woyu Zhang; Yifei Yu; Yue Zhang 011; Xinyuan Zhang 008; Kwunhang Wong; Songqi Wang; et al. (Nat. Comput. Sci., 2025)

A Six-Phase Harmonic-Rejection Digital Transmitter. - Jiaxiang Li; Zimu Li; Yun Yin; Changgu Yan; Nan Qi 002; Ming Liu 022; Hongtao Xu (IEEE J. Solid State Circuits, 2025)