NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealities. - James Read; Ming-Yen Lee; Wei-Hsing Huang; Yuan-Chun Luo; Anni Lu; Shimeng Yu (CoRR, 2025)

CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms. - Faaiq Waqar; Ming-Yen Lee; Seongwon Yoon; Seongkwang Lim; Shimeng Yu (CoRR, 2025)

Architecting Long-Context LLM Acceleration with Packing-Prefetch Scheduler and Ultra-Large Capacity On-Chip Memories. - Ming-Yen Lee; Faaiq Waqar; Hanchen Yang; Muhammed Ahosan Ul Karim; Harsono Simka; Shimeng Yu (CoRR, 2025)