Definition of Burstiness and Quantization for Delay Sensitive Traffic Streams. - Tsern-Huei Lee; Kuen-Chu Lai; Ming-Ying Tsai (INFOCOM, 1996)

Processors Allocation for MPSoCs With Single ISA Heterogeneous Multi-Core Architecture. - Yi-Jung Chen; Wen-Wei Chang; Chia-Yin Liu; Cheng-En Wu; Bo-Yuan Chen; Ming-Ying Tsai (IEEE Access, 2017)

ResSaNet: A Hybrid Backbone of Residual Block and Self-Attention Module for Masked Face Recognition. - Wei-Yi Chang; Ming-Ying Tsai; Shih-Chieh Lo (ICCVW, 2021)