A FPGA real-time stereo vision system with luminance control and projected pattern. - Yuan Xu; Haodong Yao; Liwei Gong; Mingcheng Zhu 002; Robert K. F. Teng (ASICON, 2013)

Study of a FPGA real-time multi-cameras cylindrical panorama video system with low latency and high performance. - Yuan Xu; Qinghai Zhou; Liwei Gong; Mingcheng Zhu 002; Robert K. F. Teng (IVMSP, 2013)

High-Speed Simultaneous Image Distortion Correction Transformations for a Multicamera Cylindrical Panorama Real-time Video System Using FPGA. - Yuan Xu; Qinghai Zhou; Liwei Gong; Mingcheng Zhu 002; Xiaohong Ding; Robert K. F. Teng (IEEE Trans. Circuits Syst. Video Technol., 2014)

Arbitrary shape multilayer interconnects EMC modelling and optimization. - Boyuan Zhu; Junwei Lu; Mingcheng Zhu 002; Mei Jiang (EMC Compo, 2015)

Low-jitter all-digital phase-locked loop with novel PFD and high resolution TDC & DCO. - Xiaoying Deng; Yanyan Mo; Xin Lin; Mingcheng Zhu 002 (SoCC, 2016)

A 0.23 mW self-biased current-reuse CMOS LC-VCO based on novel interposed network. - Xiaoying Deng; Xin Lin; Mingcheng Zhu 002 (IEICE Electron. Express, 2017)

A 0.35 V 376 Mb/s Configurable Long Integer Multiplier for Subthreshold Encryption. - Weiwei Shi 001; Hai-Peng Wang; Chiu-Sing Choy; Junwei Yang; Mei Jiang; Robert K. F. Teng; Mingcheng Zhu 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

An FPGA based Parallel Implementation for Point Cloud Neural Network. - Xitao Zheng; Mingcheng Zhu 002; Yuan Xu; Yutong Li (ASICON, 2019)

Modeling Simulation and Circuit Implementation of Millimeter Wave Phase-Locked Loop Based on Simulink. - He Xiao; Xiaoying Deng; Mingcheng Zhu 002 (ICICDT, 2019)

Tracking a Golf Ball With High-Speed Stereo Vision System. - Shaobo Wang; Yuan Xu; Yanghao Zheng; Mingcheng Zhu 002; Haodong Yao; Zhiyong Xiao (IEEE Trans. Instrum. Meas., 2019)

3D Anthropometric Algorithm from A Single Viewpoint RGB-D Camera. - Xitao Zheng; Mingcheng Zhu 002; Yuan Xu (ICACI, 2020)

A Novel Group-Division-Multiplexing Complementary Symmetric Reference Sensing Scheme for MRAM. - Xiaoying Deng; Zhenyu Jiang; Mingcheng Zhu 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)