k-Server Optimal Task Scheduling Problem with Convex Cost Function. - Mingjie Lin; Yaling Ma (WiOpt, 2005)

The throughput of a buffered crossbar switch. - Mingjie Lin; Nick McKeown (IEEE Commun. Lett., 2005)

Performance benefits of monolithically stacked 3D-FPGA. - Mingjie Lin; Abbas El Gamal; Yi-Chang Lu; S. Simon Wong (FPGA, 2006)

Power-efficient rate scheduling in wireless links using computational geometric algorithms. - Mingjie Lin; Yashar Ganjali (IWCMC, 2006)

A routing fabric for monolithically stacked 3D-FPGA. - Mingjie Lin; Abbas El Gamal (FPGA, 2007)

Collaborative Routing Architecture for FPGA. - Yaling Ma; Mingjie Lin (ISCAS, 2007)

Performance Benefits of Monolithically Stacked 3-D FPGA. - Mingjie Lin; Abbas El Gamal; Yi-Chang Lu; S. Simon Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

The amorphous FPGA architecture. - Mingjie Lin (FPGA, 2008)

TORCH: a design tool for routing channel segmentation in FPGAs. - Mingjie Lin; Abbas El Gamal (FPGA, 2008)

HAFT: A hybrid FPGA with amorphous and fault-tolerant architecture. - Mingjie Lin; Steve Ferguson; Yaling Ma; Timothy Greene (ISCAS, 2008)

A low-power monolithically stacked 3D-TCAM. - Mingjie Lin; Jianying Luo; Yaling Ma (ISCAS, 2008)

Base-Calling in DNA Pyrosequencing with Reconfigurable Bayesian Network. - Mingjie Lin; Yaling Ma (ReConFig, 2009)

A Low-Power Field-Programmable Gate Array Routing Fabric. - Mingjie Lin; Abbas El Gamal (IEEE Trans. Very Large Scale Integr. Syst., 2009)

High-throughput bayesian computing machine with reconfigurable hardware. - Mingjie Lin; Ilia A. Lebedev; John Wawrzynek (FPGA, 2010)

Scalable architecture for programmable quantum gate array (abstract only). - Mingjie Lin; Yaling Ma (FPGA, 2010)

OpenRCL: Low-Power High-Performance Computing with Reconfigurable Devices. - Mingjie Lin; Ilia A. Lebedev; John Wawrzynek (FPL, 2010)

MARC: A Many-Core Approach to Reconfigurable Computing. - Ilia A. Lebedev; Shaoyi Cheng; Austin Doupnik; James C. Martin; Christopher W. Fletcher; Daniel Burke; Mingjie Lin; John Wawrzynek (ReConFig, 2010)

Cascading Deep Pipelines to Achieve High Throughput in Numerical Reduction Operations. - Mingjie Lin; Shaoyi Cheng; John Wawrzynek (ReConFig, 2010)

Improving FPGA Placement With Dynamically Adaptive Stochastic Tunneling. - Mingjie Lin; John Wawrzynek (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Exploring FPGA Routing Architecture Stochastically. - Mingjie Lin; John Wawrzynek; Abbas El Gamal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Using many-core architectural templates for FPGA-based computing (abstract only). - Mingjie Lin; Shaoyi Cheng; John Wawrzynek (FPGA, 2011)

Discriminatively Fortified Computing with Reconfigurable Digital Fabric. - Mingjie Lin; Yu Bai 004; John Wawrzynek (HASE, 2011)

Exploiting Memory-Level Parallelism in Reconfigurable Accelerators. - Shaoyi Cheng; Mingjie Lin; Hao Jun Liu; Simon Scott; John Wawrzynek (FCCM, 2012)

Exploring Many-Core Design Templates for FPGAs and ASICs. - Ilia A. Lebedev; Christopher W. Fletcher; Shaoyi Cheng; James C. Martin; Austin Doupnik; Daniel Burke; Mingjie Lin; John Wawrzynek (Int. J. Reconfigurable Comput., 2012)

Selectively Fortifying Reconfigurable Computing Device to Achieve Higher Error Resilience. - Mingjie Lin; Yu Bai 004; John Wawrzynek (J. Electr. Comput. Eng., 2012)

Boosting Memory Performance of Many-Core FPGA Device through Dynamic Precedence Graph. - Yu Bai 004; Abigail Fuentes-Rivera; Michael Riera; Mohammed Alawad; Mingjie Lin (FCCM, 2013)

Exploiting algorithmic-level memory parallelism in distributed logic-memory architecture through hardware-assisted dynamic graph (abstract only). - Yu Bai 004; Abigail Fuentes-Rivera; Mingjie Lin; Mike Riera (FPGA, 2013)

Extracting memory-level parallelism through reconfigurable hardware traces. - Mingjie Lin; Shaoyi Cheng; John Wawrzynek (ReConFig, 2013)

Improving memory performance in reconfigurable computing architecture through hardware-assisted dynamic graph. - Yu Bai 004; Mohammed Alawad; Michael Riera; Mingjie Lin (ReConFig, 2013)

Inferring High Quality Co-Travel Networks - Youfang Lin; Xuguang Jia; Mingjie Lin; Steve Gregory; Huaiyu Wan; Zhihao Wu 001 (CoRR, 2013)

Energy-efficient multiplier-less discrete convolver through probabilistic domain transformation. - Mohammed Alawad; Yu Bai 004; Ronald F. DeMara; Mingjie Lin (FPGA, 2014)

Optimally mitigating BTI-induced FPGA device aging with discriminative voltage scaling (abstract only). - Yu Bai 004; Mohammed Alawad; Mingjie Lin (FPGA, 2014)

Stochastically computing discrete Fourier transform with reconfigurable digital fabric. - Yu Bai 004; Mingjie Lin (ReConFig, 2014)

Universal Random Number Generation with Field-Programmable Analog Array and Magnetic Tunneling Junction (MTJ) Devices. - Yu Bai 004; Mingjie Lin (CIT/IUCC/DASC/PICom, 2015)

FIR Filter Based on Stochastic Computing with Reconfigurable Digital Fabric. - Mohammed Alawad; Mingjie Lin (FCCM, 2015)

Energy-Efficient High-Order FIR Filtering through Reconfigurable Stochastic Processing (Abstract Only). - Mohammed Alawad; Mingjie Lin (FPGA, 2015)

Energy-Efficient Discrete Signal Processing with Field Programmable Analog Arrays (FPAAs). - Yu Bai 004; Mingjie Lin (FPGA, 2015)

Neural network-based fuzzy control surface implementation. - Mohammed Alawad; Sinan Ismail; Mingjie Lin (GlobalSIP, 2015)

Reactive rejuvenation of CMOS logic paths using self-activating voltage domains. - Rizwan A. Ashraf; Ahmad Alzahrani 001; Navid Khoshavi; Ramtin Zand; Soheil Salehi; Arman Roohi; Mingjie Lin; Ronald F. DeMara (ISCAS, 2015)

Gabor filter polynomial approximation based on a novel evolutionary stochastic technique. - Abigail Fuentes-Rivera; Mingjie Lin; Hector M. Lugo-Cordero (MILCOM, 2015)

ASTRO: Synthesizing application-specific reconfigurable hardware traces to exploit memory-level parallelism. - Mingjie Lin; Shaoyi Cheng; Ronald F. DeMara; John Wawrzynek (Microprocess. Microsystems, 2015)

Stochastic-Based Convolutional Networks with Reconfigurable Logic Fabric (Abstract Only). - Mohammed Alawad; Mingjie Lin (FPGA, 2016)

Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology (Abstract Only). - Yu Bai 004; Mingjie Lin (FPGA, 2016)

Tessellation-based multi-block memory mapping scheme for high-level synthesis with FPGA. - Juan Escobedo; Mingjie Lin (FPT, 2016)

Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices. - Yu Bai 004; Bo Hu; Weidong Kuang; Mingjie Lin (ACM Great Lakes Symposium on VLSI, 2016)

Stochastic-Based Convolutional Networks with Reconfigurable Logic Fabric. - Mohammed Alawad; Mingjie Lin (ISVLSI, 2016)

Soft Error Effect Tolerant Temporal Self-Voting Checkers: Energy vs. Resilience Tradeoffs. - Faris S. Alghareb; Mingjie Lin; Ronald F. DeMara (ISVLSI, 2016)

Stochastic-Based Deep Convolutional Networks with Reconfigurable Logic Fabric. - Mohammed Alawad; Mingjie Lin (IEEE Trans. Multi Scale Comput. Syst., 2016)

Tessellating memory space for parallel access. - Juan Escobedo; Mingjie Lin (ASP-DAC, 2017)

Stochastic-Based Multi-stage Streaming Realization of a Deep Convolutional Neural Network (Abstract Only). - Mohammed Alawad; Mingjie Lin (FPGA, 2017)

A Spin-Orbit Torque based Cellular Neural Network (CNN) Architecture. - Yu Bai 004; X. Sharon Hu; Ronald F. DeMara; Mingjie Lin (ACM Great Lakes Symposium on VLSI, 2017)

Stochastic-based multi-stage streaming realization of deep convolutional neural network. - Mohammed Alawad; Mingjie Lin (ISQED, 2017)

Sketching Computation with Stochastic Processing Engines. - Mohammed Alawad; Mingjie Lin (ACM J. Emerg. Technol. Comput. Syst., 2017)

Extracting data parallelism in non-stencil kernel computing by optimally coloring folded memory conflict graph. - Juan Escobedo; Mingjie Lin (DAC, 2018)

Graph-Theoretically Optimal Memory Banking for Stencil-Based Computing Kernels. - Juan Escobedo; Mingjie Lin (FPGA, 2018)

Architecture and Circuit Design of an All-Spintronic FPGA. - Stephen M. Williams; Mingjie Lin (FPGA, 2018)

GridGAS: An I/O-Efficient Heterogeneous FPGA+CPU Computing Platform for Very Large-Scale Graph Analytics. - Yu Zou; Mingjie Lin (FPT, 2018)

Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks. - Shaahin Angizi; Zhezhi He; Yu Bai 004; Jie Han 001; Mingjie Lin; Ronald F. DeMara; Deliang Fan (ACM Great Lakes Symposium on VLSI, 2018)

Very Large-Scale and Node-Heavy Graph Analytics with Heterogeneous FPGA+CPU Computing Platform. - Yu Zou; Mingjie Lin (ISVLSI, 2018)

Clockless Spintronic Logic: A Robust and Ultra-Low Power Computing Paradigm. - Yu Bai 004; Ronald F. DeMara; Jia Di; Mingjie Lin (IEEE Trans. Computers, 2018)

Memory-Efficient Probabilistic 2-D Finite Impulse Response (FIR) Filter. - Mohammed Alawad; Mingjie Lin (IEEE Trans. Multi Scale Comput. Syst., 2018)

Scalable FPGA Accelerator for Deep Convolutional Neural Networks with Stochastic Streaming. - Mohammed Alawad; Mingjie Lin (IEEE Trans. Multi Scale Comput. Syst., 2018)

Stochastic-Based Synapse and Soft-Limiting Neuron with Spintronic Devices for Low Power and Robust Artificial Neural Networks. - Yu Bai 004; Deliang Fan; Mingjie Lin (IEEE Trans. Multi Scale Comput. Syst., 2018)

Constructive Policy: Reinforcement Learning Approach for Connected Multi-Agent Systems. - Sayyed Jaffar Ali Raza; Mingjie Lin (CASE, 2019)

Graph-Morphing: Exploiting Hidden Parallelism of Non-Stencil Computation in High-Level Synthesis. - Yu Zou; Mingjie Lin (DAC, 2019)

Exploiting Irregular Memory Parallelism in Quasi-Stencils through Nonlinear Transformation. - Juan Escobedo; Mingjie Lin (FCCM, 2019)

Optimizing Order-Associative Kernel Computation with Joint Memory Banking and Data Reuse. - Juan Escobedo; Mingjie Lin (FPGA, 2019)

Intelligent Fan System Based on Big Data and Artificial Intelligence. - Zhihe Yang; Mingjie Lin (ICSAI, 2019)

FAST: A Frequency-Aware Skewed Merkle Tree for FPGA-Secured Embedded Systems. - Yu Zou; Mingjie Lin (ISVLSI, 2019)

Robust and Large-Scale Convolution through Stochastic-Based Processing without Multipliers. - Mohammed Alawad; Yu Bai 004; Ronald F. DeMara; Mingjie Lin (IEEE Trans. Emerg. Top. Comput., 2019)

Survey of Stochastic-Based Computation Paradigms. - Mohammed Alawad; Mingjie Lin (IEEE Trans. Emerg. Top. Comput., 2019)

Survivable Hyper-Redundant Robotic Arm with Bayesian Policy Morphing. - Sayyed Jaffar Ali Raza; Apan Dastider; Mingjie Lin (CASE, 2020)

Developmentally Synthesizing Earthworm-Like Locomotion Gaits with Bayesian-Augmented Deep Deterministic Policy Gradients (DDPG). - Sayyed Jaffar Ali Raza; Apan Dastider; Mingjie Lin (CASE, 2020)

DOMIS: Dual-Bank Optimal Micro-Architecture for Iterative Stencils. - Juan Escobedo; Mingjie Lin (FPGA, 2020)

Reactive Signal Obfuscation with Time-Fracturing to Counter Information Leakage in FPGAs. - Stephen M. Williams; Mingjie Lin (FPGA, 2020)

Massively Simulating Adiabatic Bifurcations with FPGA to Solve Combinatorial Optimization. - Yu Zou; Mingjie Lin (FPGA, 2020)

Design of Scalable Neurotransmitter-mediated Biohybrid Synapse. - Kevin A. White; Mingjie Lin; Brian N. Kim (BioCAS, 2021)

Survivable Robotic Control through Guided Bayesian Policy Search with Deep Reinforcement Learning. - Sayyed Jaffar Ali Raza; Apan Dastider; Mingjie Lin (CASE, 2021)

ARC: Reconfigurable Cache Security Assurance with Application-Specific Randomized Mapping in FPGA-Based Heterogeneous Computing. - Sanjay Gandham; Rakin Muhammad Shadab; Mingjie Lin (FCCM, 2021)

FERMAT: FPGA-Accelerated Heterogeneous Computing Platform Near NVMe Storage. - Yu Zou; Mingjie Lin (FCCM, 2021)

HERMES: Hardware-Efficient Speculative Dataflow Architecture for Bonsai Merkle Tree-Based Memory Authentication. - Yu Zou; Amro Awad; Mingjie Lin (HOST, 2021)

Safe Locomotion Within Confined Workspace using Deep Reinforcement Learning. - Apan Dastider; Sayyed Jaffar Ali Raza; Mingjie Lin (IRC, 2021)

Non-Parametric Stochastic Policy Gradient with Strategic Retreat for Non-Stationary Environment. - Apan Dastider; Mingjie Lin (CASE, 2022)

Hardware-Efficient Deconvolution-Based GAN for Edge Computing. - Azzam Alhussain; Mingjie Lin (CISS, 2022)

Hardware-Efficient Template-Based Deep CNNs Accelerator Design. - Azzam Alhussain; Mingjie Lin (NAS, 2022)

Learning adaptive control in dynamic environments using reproducing kernel priors with bayesian policy gradients. - Apan Dastider; Sayyed Jaffar Ali Raza; Mingjie Lin (SAC, 2022)

Dynamically Avoiding Amorphous Obstacles with Topological Manifold Learning and Deep Autoencoding. - Apan Dastider; Mingjie Lin (CoRR, 2022)

Reactive Whole-Body Obstacle Avoidance for Collision-Free Human-Robot Interaction with Topological Manifold Learning. - Apan Dastider; Mingjie Lin (CoRR, 2022)

Intercepting A Flying Target While Avoiding Moving Obstacles: A Unified Control Framework With Deep Manifold Learning. - Apan Dastider; Mingjie Lin (CoRR, 2022)

DirectNVM: Hardware-accelerated NVMe SSDs for High-performance Embedded Computing. - Yu Zou; Amro Awad; Mingjie Lin (ACM Trans. Embed. Comput. Syst., 2022)

ARES: Persistently Secure Non-Volatile Memory with Processor-transparent and Hardware-friendly Integrity Verification and Metadata Recovery. - Yu Zou; Kazi Abu Zubair; Mazen Al-Wadi; Rakin Muhammad Shadab; Sanjay Gandham; Amro Awad; Mingjie Lin (ACM Trans. Embed. Comput. Syst., 2022)

OCMGen: Extended Design Space Exploration with Efficient FPGA Memory Inference. - Sanjay Gandham; Lingxiang Yin; Hao Zheng 005; Mingjie Lin (FCCM, 2023)

OMT: A Demand-Adaptive, Hardware-Targeted Bonsai Merkle Tree Framework for Embedded Heterogeneous Memory Platform. - Rakin Muhammad Shadab; Yu Zou; Sanjay Gandham; Mingjie Lin (FPGA, 2023)

OMT: A Run-time Adaptive Architectural Framework for Bonsai Merkle Tree-Based Secure Authentication with Embedded Heterogeneous Memory. - Rakin Muhammad Shadab; Yu Zou; Sanjay Gandham; Mingjie Lin (HOST, 2023)

SAGA: Sparsity-Agnostic Graph Convolutional Network Acceleration with Near-Optimal Workload Balance. - Sanjay Gandham; Lingxiang Yin; Hao Zheng 005; Mingjie Lin (ICCAD, 2023)

DAMON: Dynamic Amorphous Obstacle Navigation using Topological Manifold Learning and Variational Autoencoding. - Apan Dastider; Mingjie Lin (IROS, 2023)

FPGA-QHAR: Throughput-Optimized for Quantized Human Action Recognition on The Edge. - Azzam Alhussain; Mingjie Lin (CoRR, 2023)

HMT: A Hardware-centric Hybrid Bonsai Merkle Tree Algorithm for High-performance Authentication. - Rakin Muhammad Shadab; Yu Zou; Sanjay Gandham; Amro Awad; Mingjie Lin (ACM Trans. Embed. Comput. Syst., 2023)

CTR+: A High-Performance Metadata Access Scheme for Secure Embedded Memory in Heterogeneous Computing Systems. - Rakin Muhammad Shadab; Yu Zou; Mingjie Lin (HOST, 2024)

CircuitSeer: RTL Post-PnR Delay Prediction via Coupling Functional and Structural Representation. - Sanjay Gandham; Joe Walston; Sourav Samanta; Lingxiang Yin; Hao Zheng 005; Mingjie Lin; Stelios Diamantidis (ICCAD, 2024)

RETRO: Reactive Trajectory Optimization for Real-Time Robot Motion Planning in Dynamic Environments. - Apan Dastider; Hao Fang; Mingjie Lin (ICRA, 2024)

APEX: Ambidextrous Dual-Arm Robotic Manipulation Using Collision-Free Generative Diffusion Models. - Apan Dastider; Hao Fang; Mingjie Lin (IROS, 2024)

Unified Control Framework for Real-Time Interception and Obstacle Avoidance of Fast-Moving Objects with Diffusion Variational Autoencoder. - Apan Dastider; Hao Fang; Mingjie Lin (IROS, 2024)

SCALE: A Structure-Centric Accelerator for Message Passing Graph Neural Networks. - Lingxiang Yin; Sanjay Gandham; Mingjie Lin; Hao Zheng 005 (MICRO, 2024)

A Secure Computing System With Hardware-Efficient Lazy Bonsai Merkle Tree for FPGA-Attached Embedded Memory. - Rakin Muhammad Shadab; Yu Zou; Sanjay Gandham; Amro Awad; Mingjie Lin (IEEE Trans. Dependable Secur. Comput., 2024)

Cross-Embodiment Robotic Manipulation Synthesis via Guided Demonstrations through CycleVAE and Human Behavior Transformer. - Apan Dastider; Hao Fang; Mingjie Lin (CoRR, 2025)