Design and implementation of concatenated decoder. - Yuxin You; Jinxiang Wang 001; Mingyan Yu; Yizheng Ye (DCV, 2002)

A Test Architecture for System-on-a-Chip. - Yongsheng Wang; Liyi Xiao; Mingyan Yu; Jinxiang Wang 001; Yizheng Ye (Asian Test Symposium, 2003)

Large tuning band range of high frequency filter for wireless applications. - Zhiqiang Gao; Jianguo Ma; Yizheng Ye; Mingyan Yu (ISCAS (1), 2005)

A CMOS RF tuning wide-band bandpass filter for wireless applications. - Zhiqiang Gao; Jianguo Ma; Mingyan Yu; Yizheng Ye (SoCC, 2005)

A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier. - Zhiyuan Li; Mingyan Yu; Jianguo Ma (APCCAS, 2006)

Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. - Qianneng Zhou; Fengchang Lai; Mingyan Yu (APCCAS, 2006)

Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. - Tong Zhou; Zhibo Zhou; Mingyan Yu; Yizheng Ye (APCCAS, 2006)

Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology. - Zhiyuan Li; Fengchang Lai; Mingyan Yu (ACM Great Lakes Symposium on VLSI, 2006)

On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. - Qianneng Zhou; Fengchang Lai; Mingyan Yu (ACM Great Lakes Symposium on VLSI, 2006)

A CMOS bandpass filter with wide-tuning range for wireless applications. - Zhiqiang Gao; Mingyan Yu; Yizheng Ye; Jianguo Ma (ISCAS, 2006)

Post linearization of CMOS LNA using double cascade FETs. - Guochi Huang; Tae-Sung Kim; Byung-Sung Kim; Mingyan Yu; Yizheng Ye (ISCAS, 2006)

A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs. - Zhiyuan Li; Mingyan Yu; Jianguo Ma (VLSI Design, 2006)

A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor. - Tong Zhou; Mingyan Yu; Yizheng Ye (VLSI Design, 2006)

A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends. - Zhiqiang Gao; Jianguo Ma; Mingyan Yu; Yizheng Ye (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Wideband reconfigurable CMOS Gm-C filter For wireless applications. - Zhiqiang Gao; Jinxiang Wang; Fengchang Lai; Mingyan Yu; Zhongzhao Zhang (ICECS, 2009)

M5 based EDGE architecture modeling. - Pengfei Gou; Qingbo Li; Yinghan Jin; Qi Zheng; Bing Yang; Mingyan Yu; Jinxiang Wang (ICCD, 2010)

MMPI: A flexible and efficient multiprocessor message passing interface for NoC-based MPSoC. - Fangfa Fu; Siyue Sun; Xin'an Hu; Junjie Song; Jinxiang Wang 001; Mingyan Yu (SoCC, 2010)

A 16 bit low voltage low power Delta Sigma modulator. - Yongsheng Wang; Yuanhong Li; Mingyan Yu (EMEIT, 2011)

Power Research of JPEG Circuits in FPGA. - Xinsheng Wang; Mingyan Yu (IIH-MSP, 2011)

A more practical CPA attack against present hardware implementation. - Chenxu Wang; Mingyan Yu; Jinxiang Wang; Peihe Jiang; Xiaochen Tang (CCIS, 2012)

Novel O-GEHL Based Hyperblock Predictor for EDGE Architectures. - Pengfei Gou; Bing Yang; Mingyan Yu; Zhigang Mao (NAS, 2012)

Robust current-mode on-chip interconnect signaling scheme in deep submicron. - Xinsheng Wang; Mingyang Hu; Mingyan Yu (ASICON, 2013)

The Analysis of Generic SIMT Scheduling Model Extracted from GPU. - Yuanxu Xu; Mingyan Yu; Chao Zhang; Bing Yang (NCCET, 2013)

An intelligent classification method for Trojan detection based on side-channel analysis. - Chenxu Wang; Jinghu Li; Mingyan Yu; Jinxiang Wang (IEICE Electron. Express, 2013)

A Low Power and variation-Insensitive Current-Mode Signaling Scheme. - Xinsheng Wang; Yizhe Hu; Liang Han; Jinghu Li; Chenxu Wang; Mingyan Yu (J. Circuits Syst. Comput., 2013)

A distinctive O(mn) time algorithm for optimal buffer insertions. - Xinsheng Wang; Wenpan Liu; Mingyan Yu (ISQED, 2015)

Swarm intelligence algorithm for interconnect model order reduction with sub-block structure preserving. - Xinsheng Wang; Chenxu Wang; Mingyan Yu (Int. J. Syst. Sci., 2016)

The Minimum Norm Least-Squares Solution in Reduction by Krylov Subspace Methods. - Xinsheng Wang; Chenxu Wang; Mingyan Yu (J. Circuits Syst. Comput., 2017)

Structure-Preserving-Based Model-Order Reduction of Parameterized Interconnect Systems. - Xinsheng Wang; Mingyan Yu; Chenxu Wang (Circuits Syst. Signal Process., 2018)

The Error Bound of Timing Domain in Model Order Reduction by Krylov Subspace Methods. - Xinsheng Wang; Mingyan Yu (J. Circuits Syst. Comput., 2018)

A Study of the States Kinetics in NBTI and HCI Degradation based on TCAD. - Xinhuan Yang; Mingyan Yu; Xingyu Fang; Liang Wang; Chuanzheng Wang; Yuanfu Zhao (EEET, 2023)

Comprehensive probability method of buffer insertion based on Gaussian fitting under process variation condition. - Xinsheng Wang; Yanhong Song; Mingyan Yu (Microelectron. J., 2023)

Exploring the clinical diagnostic value of linguistic learning ability in patients with disorders of consciousness using electrooculography. - Xiangyue Xiao; Junhua Ding; Mingyan Yu; Zhicai Dong; Sara Cruz; Nai Ding; Charlène Aubinet; Steven Laureys; Haibo Di; Yan Chen (NeuroImage, 2024)

Corrigendum to "Exploring the clinical diagnostic value of linguistic learning ability in patients with disorders of consciousness using electrooculography" [NeuroImage Volume 297 (2024) 120753]. - Xiangyue Xiao; Junhua Ding; Mingyan Yu; Zhicai Dong; Sara Cruz; Nai Ding; Charlène Aubinet; Steven Laureys; Haibo Di; Yan Chen (NeuroImage, 2025)