Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems. - Minje Jun; Kwanhu Bang; Hyuk-Jun Lee; Naehyuck Chang; Eui-Young Chung (ASP-DAC, 2007)

Latency-Aware Bus Arbitration for Real-Time Embedded Systems. - Minje Jun; Kwanhu Bang; Hyuk-Jun Lee; Eui-Young Chung (IEICE Trans. Inf. Syst., 2007)

Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches. - Minje Jun; Sungjoo Yoo; Eui-Young Chung (ASP-DAC, 2008)

Jitter-Conscious Bus Arbitration Scheme for Real-Time Systems. - Jong-Ho Roh; Minje Jun; Kwanhu Bang; Eui-Young Chung (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Topology Synthesis of Cascaded Crossbar Switches. - Minje Jun; Sungjoo Yoo; Eui-Young Chung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network. - Minje Jun; Sungroh Yoon; Eui-Young Chung (DATE, 2010)

Design of On-Chip Crossbar Network Topology Using Chained Edge Partitioning. - Minje Jun; Eui-Young Chung (Comput. J., 2010)

Asymmetric DRAM synthesis for heterogeneous chip multiprocessors in 3D-stacked architecture. - Minje Jun; Myoung-Jin Kim; Eui-Young Chung (ICCAD, 2012)

Partial Connection-Aware Topology Synthesis for On-Chip Cascaded Crossbar Network. - Minje Jun; Deumji Woo; Eui-Young Chung (IEEE Trans. Computers, 2012)

Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis. - Minje Jun; Won Woo Ro; Eui-Young Chung (IEEE Trans. Computers, 2014)

$C ! !- ! !Lock$ : Energy Efficient Synchronization for Embedded Multicore Systems. - Seung-Hun Kim; Sang Hyong Lee; Minje Jun; Byunghoon Lee; Won Woo Ro; Eui-Young Chung; Jean-Luc Gaudiot (IEEE Trans. Computers, 2014)