Aging-Aware Design Verification Methods Under Real Product Operating Conditions. - Hyewon Shim; Jeongmin Jo; Yoohwan Kim; Bongyong Jeong; Minji Shon; Hai Jiang 005; Sangwoo Pae (IRPS, 2019)

3D Digital Compute-in-Memory Benchmark with A5 CFET Technology. - Minji Shon; Junmo Lee; Shimeng Yu (APCCAS, 2024)

Optimization of Backside of Silicon-Compatible High Voltage Superlattice Capacitor for 12V-to-6V On-Chip Voltage Conversion. - Junmo Lee; Sunbin Deng; Jungyoun Kwak; Minji Shon; Suman Datta; Shimeng Yu (DRC, 2024)

Modeling Dynamic Interplay Between Charge Traps and Polarization for Memory Window Enhancement in Gate Injection Layers. - Minji Shon; Chinsung Park; Prasanna Venkatesan Ravindran; Lance Fernandes; Kijoon Kim; Jongho Woo; Suhwan Lim; Kwangsoo Kim; Wanki Kim; Daewon Ha; Suman Datta; Asif Khan; et al. (IRPS, 2025)

Capacitive Synaptor with Gate Surrounding Semiconductor Pillar Structure and Overturned Charge Injection for Compute-in-Memory. - Choong-Ki Kim; James Read; Minji Shon; Tae-Hyeon Kim; Myung-Su Kim; Ji-Man Yu; Min-Soo Yoo; Yang-Kyu Choi; Shimeng Yu (Adv. Intell. Syst., 2025)

Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache. - Faaiq G. Waqar; Jungyoun Kwak; Junmo Lee; Minji Shon; MohammadHosein Gholamrezaei; Kevin Skadron; Shimeng Yu (CoRR, 2025)

3-D Digital Compute-in-Memory Benchmark With A5 CFET Technology: An Extension to Lookup-Table-Based Design. - Junmo Lee; Minji Shon; Faaiq G. Waqar; Shimeng Yu (IEEE Trans. Very Large Scale Integr. Syst., 2025)