Energy-efficient reconstruction of compressively sensed bioelectrical signals with stochastic computing circuits. - Yufei Ma 002; Minkyu Kim 001; Yu Cao 001; Jae-sun Seo; Sarma B. K. Vrudhula (ICCD, 2015)

High-performance face detection with CPU-FPGA acceleration. - Abinash Mohanty; Naveen Suda; Minkyu Kim 001; Sarma B. K. Vrudhula; Jae-sun Seo; Yu Cao 001 (ISCAS, 2016)

Comprehensive Evaluation of OpenCL-based Convolutional Neural Network Accelerators in Xilinx and Altera FPGAs. - Ricardo Tapiador; Antonio Rios-Navarro; Alejandro Linares-Barranco; Minkyu Kim 001; Deepak Kadetotad; Jae-sun Seo (CoRR, 2016)

A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. - Minkyu Kim 001; Abinash Mohanty; Deepak Kadetotad; Naveen Suda; Luning Wei; Pooja Saseendran; Xiaofei He 001; Yu Cao 001; Jae-sun Seo (ASP-DAC, 2017)

End-to-end scalable FPGA accelerator for deep residual networks. - Yufei Ma 002; Minkyu Kim 001; Yu Cao 001; Sarma B. K. Vrudhula; Jae-sun Seo (ISCAS, 2017)

Comprehensive Evaluation of OpenCL-Based CNN Implementations for FPGAs. - Ricardo Tapiador-Morales; Antonio Rios-Navarro; Alejandro Linares-Barranco; Minkyu Kim 001; Deepak Kadetotad; Jae-sun Seo (IWANN (2), 2017)

Vesti: An In-Memory Computing Processor for Deep Neural Networks Acceleration. - Zhewei Jiang; Shihui Yin; Minkyu Kim 001; Tushar Gupta; Mingoo Seok; Jae-sun Seo (ACSSC, 2019)

Inference engine benchmarking across technological platforms from CMOS to RRAM. - Xiaochen Peng; Minkyu Kim 001; Xiaoyu Sun 001; Shihui Yin; Titash Rakshit; Ryan M. Hatcher; Jorge A. Kittl; Jae-sun Seo; Shimeng Yu (MEMSYS, 2019)

A 1.06- $ mu$ W Smart ECG Processor in 65-nm CMOS for Real-Time Biometric Authentication and Personal Cardiac Monitoring. - Shihui Yin; Minkyu Kim 001; Deepak Kadetotad; Yang Liu; Chisung Bae; Sang Joon Kim; Yu Cao 001; Jae-sun Seo (IEEE J. Solid State Circuits, 2019)

A Real-Time 17-Scale Object Detection Accelerator With Adaptive 2000-Stage Classification in 65 nm CMOS. - Minkyu Kim 001; Abinash Mohanty; Deepak Kadetotad; Luning Wei; Xiaofei He 001; Yu Cao 001; Jae-sun Seo (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Energy-Efficient ASIC Accelerators for Machine/Deep Learning Algorithms. - Minkyu Kim 001 (2019)

Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access. - Minkyu Kim 001; Jae-Sun Seo (CICC, 2020)

Vesti: Energy-Efficient In-Memory Computing Accelerator for Deep Neural Networks. - Shihui Yin; Zhewei Jiang; Minkyu Kim 001; Tushar Gupta; Mingoo Seok; Jae-Sun Seo (IEEE Trans. Very Large Scale Integr. Syst., 2020)

PIMCA: A 3.4-Mb Programmable In-Memory Computing Accelerator in 28nm for On-Chip DNN Inference. - Shihui Yin; Bo Zhang 105; Minkyu Kim 001; Jyotishman Saikia; Soonwan Kwon; Sungmeen Myung; Hyunsoo Kim; Sang Joon Kim; Mingoo Seok; Jae-sun Seo (VLSI Circuits, 2021)

An Energy-Efficient Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access. - Minkyu Kim 001; Jae-Sun Seo (IEEE J. Solid State Circuits, 2021)

PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference. - Bo Zhang 105; Shihui Yin; Minkyu Kim 001; Jyotishman Saikia; Soonwan Kwon; Sungmeen Myung; Hyunsoo Kim; Sang Joon Kim; Jae-Sun Seo; Mingoo Seok (IEEE J. Solid State Circuits, 2023)