Erratum to "A 7-bit 1.15-GS/s 2.6-bit/Cycle Asynchronous SAR ADC Using Comparator Decision Skip Technique With Background Offset Calibration". - Sooho Park; Changjoo Kim; Yohan Choi; Minkyun Shim; Woojin Lee; Donghwi Seo; Chulwoo Kim (IEEE J. Solid State Circuits, 2025)