A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow. - Minsik Kim 006; Kyoungseok Oh; Youngmock Cho; Hojin Seo; Xuan Truong Nguyen; Hyuk-Jae Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

HiPER: Hierarchically-Composed Processing for Efficient Robot Learning-Based Control. - Justin Ting; Minsik Kim 006; Junkang Zhu; Haotian Sheng; Zhengya Zhang (ISCA, 2025)

A Survey of Challenges and Sensing Technologies in Autonomous Retail Systems. - Shimmy Rukundo; David Wang; Front Wongnonthawitthaya; Youssouf Sidibé; Minsik Kim 006; Emily Su; Jiale Zhang (CoRR, 2025)