Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation. - Yunheung Paek; Minwook Ahn; Soonho Lee (SCOPES, 2003)

A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures. - Minwook Ahn; Jonghee W. Yoon; Yunheung Paek; Yoonjin Kim; Mary Kiemb; Kiyoung Choi (DATE, 2006)

Optimistic coalescing for heterogeneous register architectures. - Minwook Ahn; Jooyeon Lee; Yunheung Paek (LCTES, 2007)

Efficient embedded code generation with multiple load/store instructions. - Yunheung Paek; Minwook Ahn; Doosan Cho; Taehwan Kim 007 (Softw. Pract. Exp., 2007)

SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures. - Jonghee W. Yoon; Aviral Shrivastava; Sanghyun Park; Minwook Ahn; Reiley Jeyapaul; Yunheung Paek (ASP-DAC, 2008)

Iterative Algorithm for Compound Instruction Selection with Register Coalescing. - Minwook Ahn; Jonghee M. Youn; Youngkyu Choi; Doosan Cho; Yunheung Paek (DSD, 2009)

Orthogonal Instruction Encoding for a 16-bit Embedded Processor with Dynamic Implied Addressing Mode. - Jonghee M. Youn; Daeho Kim; Minwook Ahn; Yongjoo Kim; Yunheung Paek (HPCC, 2009)

A new addressing mode for the encoding space problem on embedded processors. - Jonghee M. Youn; Minwook Ahn; Daeho Kim; Jonghee W. Yoon; Yunheung Paek; Sechul Shin; Hochang Chae; Jeonghun Cho 001 (SASP, 2009)

Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications. - Doosan Cho; Sudeep Pasricha; Ilya Issenin; Nikil D. Dutt; Minwook Ahn; Yunheung Paek (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Register coalescing techniques for heterogeneous register architecture with copy sifting. - Minwook Ahn; Yunheung Paek (ACM Trans. Embed. Comput. Syst., 2009)

Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers. - Minwook Ahn; Yunheung Paek (Trans. High Perform. Embed. Archit. Compil., 2009)

A Graph Drawing Based Spatial Mapping Algorithm for Coarse-Grained Reconfigurable Architectures. - Jonghee W. Yoon; Aviral Shrivastava; Sanghyun Park; Minwook Ahn; Yunheung Paek (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Two versions of architectures for dynamic implied addressing mode. - Jonghee M. Youn; Minwook Ahn; Yunheung Paek; Jongwung Kim; Jeonghun Cho 001 (J. Syst. Archit., 2010)

Design evaluation of OpenCL compiler framework for Coarse-Grained Reconfigurable Arrays. - Hee-Seok Kim; Minwook Ahn; John A. Stratton; Wen-mei W. Hwu (FPT, 2012)

SCC based modulo scheduling for coarse-grained reconfigurable processors. - Wonsub Kim; Donghoon Yoo; Haewoo Park; Minwook Ahn (FPT, 2012)

Dynamic Operands Insertion for VLIW Architecture with a Reduced Bit-width Instruction Set. - Jongwon Lee; Jonghee M. Youn; Jihoon Lee; Minwook Ahn; Yunheung Paek (IPDPS, 2012)

Verification of CGRA Executable Code and Debugging of Memory Dependence Violation. - Heejun Shim; Minwook Ahn; JinSae Jung; Yenjo Han; Soojung Ryu (MTV, 2012)

Reevaluating the latency claims of 3D stacked memories. - Daniel W. Chang; Gyungsu Byun; Hoyoung Kim; Minwook Ahn; Soojung Ryu; Nam Sung Kim; Michael J. Schulte (ASP-DAC, 2013)

Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. - Daniel W. Chang; Young Hoon Son; Jung Ho Ahn; Hoyoung Kim; Minwook Ahn; Michael J. Schulte; Nam Sung Kim (ICCAD, 2013)

The acceleration of various multimedia applications on reconfigurable processor. - Minwook Ahn; Donghoon Yoo; Soojung Ryu; Jeongwook Kim (ICCE, 2013)

Nop compression scheme for high speed DSPs based on VLIW architecture. - Taisong Jin; Minwook Ahn; Donghoon Yoo; Dongkwan Suh; Yoonseo Choi; Do Hyung Kim 002; Shihwa Lee (ICCE, 2014)

JTS-based static branch prediction. - Taisong Jin; Jinseok Lee; Minwook Ahn; Yoonseo Choi; Do Hyung Kim 002; Shihwa Lee (ICCE, 2014)

Source level offloading for special-purpose hardware accelerators. - Shin-gyu Kim; Chaeseok Im; Minwook Ahn; Seungwon Lee (ICCE, 2015)

Online Speech Dereverberation Using RLS-WPE Based on a Full Spatial Correlation Matrix Integrated in a Speech Enhancement System. - Jun Hyung Kim; Jazzson Park; Minwook Ahn; Yeonbok Lee; Wonsub Kim; Hyung-Min Park (IWAENC, 2018)

AIX: A high performance and energy efficient inference accelerator on FPGA for a DNN-based commercial speech recognition. - Minwook Ahn; Seok Joong Hwang; Wonsub Kim; Seungrok Jung; Yeonbok Lee; Mookyoung Chung; Woohyung Lim; Young Joon Kim (DATE, 2019)

Visual Preference Inference: An Image Sequence-Based Preference Reasoning in Tabletop Object Manipulation. - Joonhyung Lee; Sangbeom Park; Yongin Kwon; Jemin Lee; Minwook Ahn; Sungjoon Choi (IROS, 2024)