An improved timing error prediction monitor for wide adaptive frequency scaling. - Weiwei Shan; Xinning Liu; Minyi Lu; Shuai Shao; Zhikuang Cai; Jun Yang 006 (IEICE Electron. Express, 2017)

A 0.46V-1.1V Transition-Detector with In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in AES Accelerator. - Xinchao Shang; Weiwei Shan; Jiaming Xu; Minyi Lu; Yiming Xiang; Longxing Shi; Jun Yang 006 (A-SSCC, 2018)

Correlation-Based Electromagnetic Analysis Attack Using Haar Wavelet Reconstruction with Low-Pass Filtering on an FPGA Implementaion of AES. - Aiguo Bu; Wentao Dai; Minyi Lu; Hao Cai 001; Weiwei Shan (TrustCom/BigDataSE, 2018)

A Compact, Lightweight and Low-Cost 8-Bit Datapath AES Circuit for IoT Applications in 28nm CMOS. - Minyi Lu; Ao Fan; Jiaming Xu; Weiwei Shan (TrustCom/BigDataSE, 2018)

Differential Power Analysis of 8-Bit Datapath AES for IoT Applications. - Jiaming Xu; Ao Fan; Minyi Lu; Weiwei Shan (TrustCom/BigDataSE, 2018)

A Low-Overhead Timing Monitoring Technique for Variation-Tolerant Near-Threshold Digital Integrated Circuits. - Weiwei Shan; Xinning Liu; Minyi Lu; Liang Wan; Jun Yang 006 (IEEE Access, 2018)

A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System. - Weiwei Shan; Wentao Dai; Liang Wan; Minyi Lu; Longxing Shi; Mingoo Seok; Jun Yang 006 (IEEE J. Solid State Circuits, 2020)

Machine Learning Assisted Side-Channel-Attack Countermeasure and Its Application on a 28-nm AES Circuit. - Weiwei Shan; Shuai Zhang; Jiaming Xu; Minyi Lu; Longxing Shi; Jun Yang 006 (IEEE J. Solid State Circuits, 2020)

A Wide-Voltage-Range Transition-Detector With In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in 28 nm CMOS. - Xinchao Shang; Minyi Lu; Chengjun Wu; Yiming Xiang; Jiaming Xu; Weiwei Shan (IEEE Trans. Circuits Syst., 2020)

Sports training simulation system based on video processing technology. - Minyi Lu (ICISCAE (ACM), 2021)