Analog VLSI for robot path planning. - Mircea R. Stan; Wayne P. Burleson; Christopher I. Connolly; Roderic A. Grupen (J. VLSI Signal Process., 1994)

Coding a terminated bus for low power. - Mircea R. Stan; Wayne P. Burleson (Great Lakes Symposium on VLSI, 1995)

Bus-invert coding for low-power I/O. - Mircea R. Stan; Wayne P. Burleson (IEEE Trans. Very Large Scale Integr. Syst., 1995)

Two dimensional codes for low power. - Mircea R. Stan; Wayne P. Burleson (ISLPED, 1996)

Synchronous Up/Down Counter with Clock Period Independent of Counter Size. - Mircea R. Stan (IEEE Symposium on Computer Arithmetic, 1997)

Power reduction techniques for a spread spectrum based correlator. - David Garrett; Mircea R. Stan (ISLPED, 1997)

Low-power encodings for global communication in CMOS VLSI. - Mircea R. Stan; Wayne P. Burleson (IEEE Trans. Very Large Scale Integr. Syst., 1997)

Low power architecture of the soft-output Viterbi algorithm. - David Garrett; Mircea R. Stan (ISLPED, 1998)

Low threshold CMOS circuits with low standby current. - Mircea R. Stan (ISLPED, 1998)

Long and Fast Up/Down Counters. - Mircea R. Stan; Alexandre F. Tenca; Milos D. Ercegovac (IEEE Trans. Computers, 1998)

Challenges in clockgating for a low power ASIC methodology. - David Garrett; Mircea R. Stan; Alvar Dean (ISLPED, 1999)

Optimal Voltages and Sizing for Low Power. - Mircea R. Stan (VLSI Design, 1999)

Limits to Voltage Scaling from the Low Power Perspective. - A. Forestier; Mircea R. Stan (SBCCI, 2000)

A 2.5 Mb/s, 23 mW SOVA traceback chip for turbo decoding applications. - David Garrett; Mircea R. Stan (ISCAS (4), 2001)

Active threshold compensation circuit for improved performance in cooled CMOS systems. - Joshua L. Garrett; Mircea R. Stan (ISCAS (4), 2001)

Optimal logarithmic adder structures with a fanout of two for minimizing the area-delay product. - Matthew M. Ziegler; Mircea Stan (ISCAS (2), 2001)

Low-power CMOS with subvolt supply voltages. - Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Low Power Design for ASIC Cores. - Alvar Dean; David Garrett; Mircea R. Stan; Sebastian Ventrone (VLSI Design, 2001)

Control-theoretic dynamic frequency and voltage scaling for multimedia workloads. - Zhijian Lu; Jason Hein; Marty Humphrey; Mircea R. Stan; John C. Lach; Kevin Skadron (CASES, 2002)

The Selective Pull-Up (SP) Noise Immunity Scheme for Dynamic Circuits. - Mircea R. Stan; Avishek Panigrahi (DATE, 2002)

Power Issues Related to Branch Prediction. - Dharmesh Parikh; Kevin Skadron; Yan Zhang 028; Marco Barcella; Mircea R. Stan (HPCA, 2002)

Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. - Kevin Skadron; Tarek F. Abdelzaher; Mircea R. Stan (HPCA, 2002)

A Case for CMOS/nano co-design. - Matthew M. Ziegler; Mircea R. Stan (ICCAD, 2002)

Circuit-level techniques to control gate leakage for sub-100nm CMOS. - Fatih Hamzaoglu; Mircea R. Stan (ISLPED, 2002)

Odd/even bus invert with two-phase transfer for buses with coupling. - Yan Zhang 028; John C. Lach; Kevin Skadron; Mircea R. Stan (ISLPED, 2002)

Teaching processor architecture with a VLSI perspective. - Mircea R. Stan; Kevin Skadron (WCAE, 2002)

CMOS Circuits with Subvolt Supply Voltages. - Mircea R. Stan (IEEE Des. Test Comput., 2002)

5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS. - Sriram R. Vangal; Mark A. Anders 001; Nitin Borkar; Erik Seligman; Venkatesh Govindarajulu; Vasantha Erraguntla; Howard Wilson; Amaresh Pangal; Venkat Veeramachaneni; James W. Tschanz; Yibin Ye; Dinesh Somasekhar; et al. (IEEE J. Solid State Circuits, 2002)

Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache. - Fatih Hamzaoglu; Yibin Ye; Ali Keshavarzi; Kevin Zhang 001; Siva G. Narendra; Shekhar Borkar; Mircea R. Stan; Vivek De (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Reducing Multimedia Decode Power using Feedback Control. - Zhijian Lu; John C. Lach; Mircea R. Stan; Kevin Skadron (ICCD, 2003)

Temperature-Aware Microarchitecture. - Kevin Skadron; Mircea R. Stan; Wei Huang 004; Sivakumar Velusamy; Karthik Sankaranarayanan; David Tarjan (ISCA, 2003)

MTCMOS with outer feedback (MTOF) flip-flops. - Mircea R. Stan; Marco Barcella (ISCAS (5), 2003)

The CMOS/nano interface from a circuits perspective. - Matthew M. Ziegler; Mircea R. Stan (ISCAS (4), 2003)

Guest Editors' Introduction: Power-Aware Computing. - Mircea R. Stan; Kevin Skadron (Computer, 2003)

Alloyed Branch History: Combining Global and Local Branch History for Robust Performance. - Zhijian Lu; John C. Lach; Mircea R. Stan; Kevin Skadron (Int. J. Parallel Program., 2003)

Temperature-Aware Computer Systems: Opportunities and Challenges. - Kevin Skadron; Mircea R. Stan; Wei Huang 004; Sivakumar Velusamy; Karthik Sankaranarayanan; David Tarjan (IEEE Micro, 2003)

HotSpot: a dynamic compact thermal model at the processor-architecture level. - Mircea R. Stan; Kevin Skadron; Marco Barcella; Wei Huang 004; Karthik Sankaranarayanan; Sivakumar Velusamy (Microelectron. J., 2003)

Molecular electronics: from devices and interconnect to circuits and architecture. - Mircea R. Stan; Paul D. Franzon; Seth Copen Goldstein; John C. Lach; Matthew M. Ziegler (Proc. IEEE, 2003)

System level leakage reduction considering the interdependence of temperature and leakage. - Lei He 001; Weiping Liao; Mircea R. Stan (DAC, 2004)

Compact thermal modeling for temperature-aware design. - Wei Huang 004; Mircea R. Stan; Kevin Skadron; Karthik Sankaranarayanan; Shougata Ghosh; Sivakumar Velusamy (DAC, 2004)

State-Preserving vs. Non-State-Preserving Leakage Control in Caches. - Yingmin Li; Dharmesh Parikh; Yan Zhang 028; Karthik Sankaranarayanan; Mircea R. Stan; Kevin Skadron (DATE, 2004)

A Unified Design Space for Regular Parallel Prefix Adders. - Matthew M. Ziegler; Mircea R. Stan (DATE, 2004)

Interconnect lifetime prediction under dynamic stress for reliability-aware design. - Zhijian Lu; Wei Huang 004; John C. Lach; Mircea R. Stan; Kevin Skadron (ICCAD, 2004)

Systolic counters with unique zero state. - Mircea R. Stan (ISCAS (2), 2004)

Perfect 3-Limited-Weight Code for Low Power I/O. - Mircea R. Stan; Yan Zhang 028 (PATMOS, 2004)

Non-Manhattan maze routing. - Mircea R. Stan; Fatih Hamzaoglu; David Garrett (SBCCI, 2004)

Temperature-aware microarchitecture: Modeling and implementation. - Kevin Skadron; Mircea R. Stan; Karthik Sankaranarayanan; Wei Huang 004; Sivakumar Velusamy; David Tarjan (ACM Trans. Archit. Code Optim., 2004)

Power-Aware Branch Prediction: Characterization and Design. - Dharmesh Parikh; Kevin Skadron; Yan Zhang 028; Mircea R. Stan (IEEE Trans. Computers, 2004)

Large-signal two-terminal device model for nanoelectronic circuit analysis. - Garrett S. Rose; Matthew M. Ziegler; Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Optimal procrastinating voltage scheduling for hard real-time systems. - Yan Zhang 028; Zhijian Lu; John C. Lach; Kevin Skadron; Mircea R. Stan (DAC, 2005)

Monitoring Temperature in FPGA based SoCs. - Sivakumar Velusamy; Wei Huang 004; John C. Lach; Mircea R. Stan; Kevin Skadron (ICCD, 2005)

A three-level toggle-avoid bus signaling scheme. - Yan Zhang 028; Travis N. Blalock; Mircea R. Stan (ISCAS (2), 2005)

The need for a full-chip and package thermal model for thermally optimized IC designs. - Wei Huang 004; Eric Humenay; Kevin Skadron; Mircea R. Stan (ISLPED, 2005)

A Case for Thermal-Aware Floorplanning at the Microarchitectural Level. - Karthik Sankaranarayanan; Sivakumar Velusamy; Mircea R. Stan; Kevin Skadron (J. Instr. Level Parallelism, 2005)

Improved Thermal Management with Reliability Banking. - Zhijian Lu; John C. Lach; Mircea R. Stan; Kevin Skadron (IEEE Micro, 2005)

Procrastinating voltage scheduling with discrete frequency sets. - Zhijian Lu; Yan Zhang 028; Mircea R. Stan; John C. Lach; Kevin Skadron (DATE, 2006)

Design approaches for hybrid CMOS/molecular memory based on experimental device data. - Garrett S. Rose; Adam C. Cabe; Nadine Gergel-Hackett; Nabanita Majumdar; Mircea R. Stan; John C. Bean; Lloyd R. Harriott; Yuxing Yao; James M. Tour (ACM Great Lakes Symposium on VLSI, 2006)

A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors. - Zhenyu Qi 001; Wei Huang 004; Adam C. Cabe; Wenqian Wu; Yan Zhang 028; Garrett S. Rose; Mircea R. Stan (SoCC, 2006)

Hybrid CMOS/Molecular Electronic Circuits. - Mircea R. Stan; Garrett S. Rose; Matthew M. Ziegler (VLSI Design, 2006)

HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design. - Wei Huang 004; Shougata Ghosh; Sivakumar Velusamy; Karthik Sankaranarayanan; Kevin Skadron; Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2006)

SODA: Sensitivity Based Optimization of Disk Architecture. - Yan Zhang 028; Sudhanva Gurumurthi; Mircea R. Stan (DAC, 2007)

Temperature-aware circuit design using adaptive body biasing. - Yan Zhang 028; Mircea R. Stan (ACM Great Lakes Symposium on VLSI, 2007)

Structured and tuned array generation (STAG) for high-performance random logic. - Matthew M. Ziegler; Gary S. Ditlow; Stephen V. Kosonocky; Zhenyu Qi 001; Mircea R. Stan (ACM Great Lakes Symposium on VLSI, 2007)

Multi-Dimensional Circuit and Micro-Architecture Level Optimization. - Zhenyu Qi 001; Matthew M. Ziegler; Stephen V. Kosonocky; Jan M. Rabaey; Mircea R. Stan (ISQED, 2007)

Accurate Back-of-the-Envelope Transistor Model for Deep Sub-micron MOS. - Zhenyu Qi 001; Mircea R. Stan (MSE, 2007)

Teaching Top-Down ASIC/SoC Design vs Bottom-Up Custom VLSI. - Mircea R. Stan; Adam C. Cabe; Sudeep Ghosh; Zhenyu Qi 001 (MSE, 2007)

Designing CMOS/molecular memories while considering device parameter variations. - Garrett S. Rose; Yuxing Yao; James M. Tour; Adam C. Cabe; Nadine Gergel-Hackett; Nabanita Majumdar; John C. Bean; Lloyd R. Harriott; Mircea R. Stan (ACM J. Emerg. Technol. Comput. Syst., 2007)

Conformational Molecular Switches for Post-CMOS Nanoelectronics. - Alain E. Kaloyeros; Mircea R. Stan; Barry Arkles; Robert E. Geer; Eric T. Eisenbraun; James E. Raynolds; Anand Gadre; Yongqiang Xue; James Ryan (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

A Programmable Majority Logic Array Using Molecular Scale Electronics. - Garrett S. Rose; Mircea R. Stan (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Interconnect Lifetime Prediction for Reliability-Aware Systems. - Zhijian Lu; Wei Huang 004; Mircea R. Stan; Kevin Skadron; John C. Lach (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Many-core design from a thermal perspective. - Wei Huang 004; Mircea R. Stan; Karthik Sankaranarayanan; Robert J. Ribando; Kevin Skadron (DAC, 2008)

NBTI resilient circuits using adaptive body biasing. - Zhenyu Qi 001; Mircea R. Stan (ACM Great Lakes Symposium on VLSI, 2008)

Intra-disk Parallelism: An Idea Whose Time Has Come. - Sriram Sankar; Sudhanva Gurumurthi; Mircea R. Stan (ISCA, 2008)

Sensitivity Based Power Management of Enterprise Storage Systems. - Sriram Sankar; Sudhanva Gurumurthi; Mircea R. Stan (MASCOTS, 2008)

Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model. - Wei Huang 004; Karthik Sankaranarayanan; Kevin Skadron; Robert J. Ribando; Mircea R. Stan (IEEE Trans. Computers, 2008)

Electromigration-aware design. - Mircea R. Stan; Paolo Re (ECCTD, 2009)

Graphene Devices, Interconnect and Circuits - Challenges and Opportunities. - Mircea R. Stan; Dincer Unluer; Avik W. Ghosh; Frank Tseng (ISCAS, 2009)

Differentiating the roles of IR measurement and simulation for power and temperature-aware design. - Wei Huang 004; Kevin Skadron; Sudhanva Gurumurthi; Robert J. Ribando; Mircea R. Stan (ISPASS, 2009)

Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. - Adam C. Cabe; Zhenyu Qi 001; Stuart N. Wooters; Travis N. Blalock; Mircea R. Stan (ISQED, 2009)

Using Intradisk Parallelism to Build Energy-Efficient Storage Systems. - Sudhanva Gurumurthi; Sriram Sankar; Mircea R. Stan (IEEE Micro, 2009)

Sensitivity-Based Optimization of Disk Architecture. - Sriram Sankar; Yan Zhang 028; Sudhanva Gurumurthi; Mircea R. Stan (IEEE Trans. Computers, 2009)

Improving SRAM Vmin and yield by using variation-aware BTI stress. - Jiajing Wang; Satyanand Nalam; Zhenyu Qi 001; Randy W. Mann; Mircea R. Stan; Benton H. Calhoun (CICC, 2010)

Stacking SRAM banks for ultra low power standby mode operation. - Adam C. Cabe; Zhenyu Qi 001; Mircea R. Stan (DAC, 2010)

SRAM-based NBTI/PBTI sensor system design. - Zhenyu Qi 001; Jiajing Wang; Adam C. Cabe; Stuart N. Wooters; Travis N. Blalock; Benton H. Calhoun; Mircea R. Stan (DAC, 2010)

FlashPower: A detailed power model for NAND flash memory. - Vidyabhushan Mohan; Sudhanva Gurumurthi; Mircea R. Stan (DATE, 2010)

Reliability/wearout-aware design. - Mircea Stan (Green Computing Conference, 2010)

How I Learned to Stop Worrying and Love Flash Endurance. - Vidyabhushan Mohan; Taniya Siddiqua; Sudhanva Gurumurthi; Mircea R. Stan (HotStorage, 2010)

Temperature-to-power mapping. - Zhenyu Qi 001; Brett H. Meyer; Wei Huang 004; Robert J. Ribando; Kevin Skadron; Mircea R. Stan (ICCD, 2010)

The Promise of Nanomagnetics and Spintronics for Future Logic and Universal Memory. - Stuart A. Wolf; Jiwei Lu; Mircea R. Stan; Eugene Chen; Daryl M. Treger (Proc. IEEE, 2010)

Experimental demonstration of standby power reduction using voltage stacking in an 8Kb embedded FDSOI SRAM. - Adam C. Cabe; Mircea R. Stan (ACM Great Lakes Symposium on VLSI, 2011)

RAMA: a self-assembled multiferroic magnetic QCA for low power systems. - Mehdi Kabir; Mircea R. Stan; Stuart A. Wolf; Ryan B. Comes; Jiwei Lu (ACM Great Lakes Symposium on VLSI, 2011)

Relaxing non-volatility for fast and energy-efficient STT-RAM caches. - Clinton Wills Smullen IV; Vidyabhushan Mohan; Anurag Nigam; Sudhanva Gurumurthi; Mircea R. Stan (HPCA, 2011)

The STeTSiMS STT-RAM simulation and modeling system. - Clinton Wills Smullen IV; Anurag Nigam; Sudhanva Gurumurthi; Mircea R. Stan (ICCAD, 2011)

Delivering on the promise of universal memory for spin-transfer torque RAM (STT-RAM). - Anurag Nigam; Clinton Wills Smullen IV; Vidyabhushan Mohan; Eugene Chen; Sudhanva Gurumurthi; Mircea R. Stan (ISLPED, 2011)

Modeling and analyzing NBTI in the presence of Process Variation. - Taniya Siddiqua; Sudhanva Gurumurthi; Mircea R. Stan (ISQED, 2011)

Temperature-Aware Architecture: Lessons and Opportunities. - Wei Huang 004; Malcolm Allen-Ware; John B. Carter; Mircea R. Stan; Edmund Cheng (IEEE Micro, 2011)

Scaling with Design Constraints: Predicting the Future of Big Chips. - Wei Huang 004; Karthick Rajamani; Mircea R. Stan; Kevin Skadron (IEEE Micro, 2011)

Thermal benefit of multi-core floorplanning: A limits study. - Karthik Sankaranarayanan; Brett H. Meyer; Mircea R. Stan; Kevin Skadron (Sustain. Comput. Informatics Syst., 2011)

Breaking the 3D IC power delivery wall. - Kaushik Mazumdar; Mircea R. Stan (ACSCC, 2012)

Breaking the power delivery wall using voltage stacking. - Kaushik Mazumdar; Mircea R. Stan (ACM Great Lakes Symposium on VLSI, 2012)

A new taxonomy for reconfigurable prefix adders. - Stevo D. Bailey; Mircea R. Stan (ISCAS, 2012)

Self-assembled multiferroic magnetic QCA structures for low power systems. - Mircea R. Stan; Mehdi Kabir; Jiwei Lu; Stuart A. Wolf (ISCAS, 2012)

Design of near threshold All Digital Delay Locked Loops. - Mehdi Sadi; Mircea Stan (SoCC, 2012)

ArchFP: Rapid prototyping of pre-RTL floorplans. - Gregory G. Faust; Runjie Zhang; Kevin Skadron; Mircea R. Stan; Brett H. Meyer (VLSI-SoC, 2012)

Tracking On-Chip Age Using Distributed, Embedded Sensors. - Stuart N. Wooters; Adam C. Cabe; Zhenyu Qi 001; Jiajing Wang; Randy W. Mann; Benton H. Calhoun; Mircea R. Stan; Travis N. Blalock (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Breaking power delivery walls using voltage stacking. - Mircea Stan (ISVLSI, 2013)

Nano-pattemed coupled spin torque nano oscillator (STNO) arrays - A potentially disruptive multipurpose nanotechnology. - Mircea R. Stan; Mehdi Kabir; Jiwei Lu; Stuart A. Wolf (NEWCAS, 2013)

Architectural implications of spatial thermal filtering. - Karthik Sankaranarayanan; Brett H. Meyer; Wei Huang 004; Robert J. Ribando; Hossein Haj-Hariri; Mircea R. Stan; Kevin Skadron (Integr., 2013)

Modeling Power Consumption of NAND Flash Memories Using FlashPower. - Vidyabhushan Mohan; Trevor Bunker; Laura M. Grupp; Sudhanva Gurumurthi; Mircea R. Stan; Steven Swanson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Walking pads: Fast power-supply pad-placement optimization. - Ke Wang 011; Brett H. Meyer; Runjie Zhang; Kevin Skadron; Mircea R. Stan (ASP-DAC, 2014)

Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques. - Xinfei Guo; Wayne P. Burleson; Mircea R. Stan (DAC, 2014)

Computing with Hybrid CMOS/STO Circuits. - Mehdi Kabir; Mircea R. Stan (DAC, 2014)

Walking Pads: Managing C4 Placement for Transient Voltage Noise Minimization. - Ke Wang 011; Brett H. Meyer; Runjie Zhang; Mircea R. Stan; Kevin Skadron (DAC, 2014)

Architecture implications of pads as a scarce resource. - Runjie Zhang; Ke Wang 011; Brett H. Meyer; Mircea R. Stan; Kevin Skadron (ISCA, 2014)

A multi-output on-chip switched-capacitor DC-DC converter for near- and sub-threshold power modes. - Yingbo Zhao; Yintang Yang; Kaushik Mazumdar; Xinfei Guo; Mircea R. Stan (ISCAS, 2014)

Spin torque nano oscillators as key building blocks for the Systems-on-Chip of the future. - Mircea R. Stan; Mehdi Kabir; Stuart A. Wolf; Jiwei Lu (NANOARCH, 2014)

A cross-layer design exploration of charge-recycled power-delivery in many-layer 3d-IC. - Runjie Zhang; Kaushik Mazumdar; Brett H. Meyer; Ke Wang 011; Kevin Skadron; Mircea R. Stan (DAC, 2015)

Association Rule Mining with the Micron Automata Processor. - Ke Wang 011; Yanjun Qi; Jeffrey J. Fox; Mircea R. Stan; Kevin Skadron (IPDPS, 2015)

Transient voltage noise in charge-recycled power delivery networks for many-layer 3D-IC. - Runjie Zhang; Kaushik Mazumdar; Brett H. Meyer; Ke Wang 011; Kevin Skadron; Mircea R. Stan (ISLPED, 2015)

A digitally-controlled power-aware low-dropout regulator to reduce standby current drain in ultra-low-power MCU. - Kaushik Mazumdar; Steven Bartling; Sudhanshu Khanna; Mircea R. Stan (ISQED, 2015)

SymmTop: A Symmetric Circuit Topology for Ultra Low Power Wide Temperature-Range Applications. - Elena K. Weinberg; Mircea R. Stan (ISVLSI, 2015)

Work hard, sleep well - Avoid irreversible IC wearout with proactive rejuvenation. - Xinfei Guo; Mircea R. Stan (ASP-DAC, 2016)

An overview of micron's automata processor. - Ke Wang 011; Kevin Angstadt; Chunkun Bo; Nathan Brunelle; Elaheh Sadredini; Tommy Tracy II; Jack Wadden; Mircea R. Stan; Kevin Skadron (CODES+ISSS, 2016)

Clear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores. - Eric Cheng; Shahrzad Mirkhani; Lukasz G. Szafaryn; Chen-Yong Cher; Hyungmin Cho; Kevin Skadron; Mircea R. Stan; Klas Lilja; Jacob A. Abraham; Pradip Bose; Subhasish Mitra (DAC, 2016)

Generating efficient and high-quality pseudo-random behavior on Automata Processors. - Jack Wadden; Nathan Brunelle; Ke Wang 011; Mohamed El-Hadedy 001; Gabriel Robins; Mircea Stan; Kevin Skadron (ICCD, 2016)

ANMLzoo: a benchmark suite for exploring bottlenecks in automata processing engines and architectures. - Jack Wadden; Vinh Dang; Nathan Brunelle; Tommy Tracy II; Deyuan Guo; Elaheh Sadredini; Ke Wang 011; Chunkun Bo; Gabriel Robins; Mircea Stan; Kevin Skadron (IISWC, 2016)

Attacking an SRAM-Based PUF through Wearout. - Alec Roelke; Mircea R. Stan (ISVLSI, 2016)

Gate Overdrive with Split-Circuit Biasing to Substitute for Body Biasing in FinFET and UTB FDSOI Circuits. - Andrew Whetzel; Mircea R. Stan (ISVLSI, 2016)

Near-Memory Data Services. - Babak Falsafi; Mircea Stan; Kevin Skadron; Nuwan Jayasena; Yunji Chen; Jinhua Tao; Ravi Nair; Jaime H. Moreno; Naveen Muralimanohar; Karthikeyan Sankaralingam; Cristian Estan (IEEE Micro, 2016)

Tolerating the Consequences of Multiple EM-Induced C4 Bump Failures. - Runjie Zhang; Brett H. Meyer; Ke Wang 011; Mircea R. Stan; Kevin Skadron (IEEE Trans. Very Large Scale Integr. Syst., 2016)

PPE-ARX: Area- and power-efficient VLIW programmable processing element for IoT crypto-systems. - Mohamed El-Hadedy 001; Xinfei Guo; Mircea R. Stan; Kevin Skadron (AHS, 2017)

Deep Healing: Ease the BTI and EM Wearout Crisis by Activating Recovery. - Xinfei Guo; Mircea R. Stan (DSN Workshops, 2017)

REAPR: Reconfigurable engine for automata processing. - Ted Xie; Vinh Dang; Jack Wadden; Kevin Skadron; Mircea Stan (FPL, 2017)

Very Low Voltage (VLV) Design. - Ramon Bertran; Pradip Bose; David M. Brooks; Jeff Burns; Alper Buyuktosunoglu; Nandhini Chandramoorthy; Eric Cheng; Martin Cochet; Schuyler Eldridge; Daniel Friedman; Hans M. Jacobson; Rajiv V. Joshi; et al. (ICCD, 2017)

Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. - Eric Cheng; Jacob A. Abraham; Pradip Bose; Alper Buyuktosunoglu; Keith A. Campbell; Deming Chen; Chen-Yong Cher; Hyungmin Cho; Binh Q. Le; Klas Lilja; Shahrzad Mirkhani; Kevin Skadron; et al. (ICCD, 2017)

Pre-RTL Voltage and Power Optimization for Low-Cost, Thermally Challenged Multicore Chips. - Alec Roelke; Runjie Zhang; Kaushik Mazumdar; Ke Wang 011; Kevin Skadron; Mircea R. Stan (ICCD, 2017)

Panel discussion: Autonomy, technology, safety - Where will automotive electronics go in the next decade? - Mircea Stan (SoCC, 2017)

Implications of accelerated self-healing as a key design knob for cross-layer resilience. - Xinfei Guo; Mircea R. Stan (Integr., 2017)

Back to the Future: Digital Circuit Design in the FinFET Era. - Xinfei Guo; Vaibhav Verma; Patricia Gonzalez-Guerrero; Sergiu Mosanu; Mircea R. Stan (J. Low Power Electron., 2017)

Hierarchical Temporal Memory on the Automata Processor. - Mateja Putic; A. J. Varshneya; Mircea R. Stan (IEEE Micro, 2017)

Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems. - Mohamed El-Hadedy 001; Xinfei Guo; Martin Margala; Mircea R. Stan; Kevin Skadron (J. Signal Process. Syst., 2017)

SRAM based opportunistic energy efficiency improvement in dual-supply near-threshold processors. - Yunfei Gu; Dengxue Yan; Vaibhav Verma; Mircea R. Stan; Xuan Zhang 001 (DAC, 2018)

Dyhard-DNN: even more DNN acceleration with dynamic hardware reconfiguration. - Mateja Putic; Swagath Venkataramani; Schuyler Eldridge; Alper Buyuktosunoglu; Pradip Bose; Mircea Stan (DAC, 2018)

OldSpot: A Pre-RTL Model for Fine-Grained Aging and Lifetime Optimization. - Alec Roelke; Xinfei Guo; Mircea Stan (ICCD, 2018)

SC-SD: Towards Low Power Stochastic Computing Using Sigma Delta Streams. - Patricia Gonzalez-Guerrero; Xinfei Guo; Mircea Stan (ICRC, 2018)

Reservoir Computing Based Neural Image Filters. - Samiran Ganguly; Yunfei Gu; Yunkun Xie; Mircea R. Stan; Avik W. Ghosh; Nibir K. Dhar (IECON, 2018)

AutomataZoo: A Modern Automata Processing Benchmark Suite. - Jack Wadden; Tommy Tracy II; Elaheh Sadredini; Lingxi Wu; Chunkun Bo; Jesse Du; Yizhou Wei; Jeffrey Udall; Matthew Wallace; Mircea Stan; Kevin Skadron (IISWC, 2018)

When "things" get older: Exploring circuit aging in IoT applications. - Xinfei Guo; Vaibhav Verma; Patricia Gonzalez-Guerrero; Mircea R. Stan (ISQED, 2018)

A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs. - Divya Akella Kamakshi; Xinfei Guo; Harsh N. Patel; Mircea R. Stan; Benton H. Calhoun (ISQED, 2018)

Integrated Synthesis Methodology for Crossbar Arrays. - Muhammed Ceylan Morgül; Onur Tunali; Mustafa Altun; Luca Frontini; Valentina Ciriani; Elena-Ioana Vatajelu; Lorena Anghel; Csaba Andras Moritz; Mircea R. Stan; Dan Alexandrescu (NANOARCH, 2018)

Co-Optimizing CPUs and Accelerators in Constrained Systems. - Alec Roelke; Mircea R. Stan (SoCC, 2018)

MNCaRT: An Open-Source, Multi-Architecture Automata-Processing Research and Execution Ecosystem. - Kevin Angstadt; Jack Wadden; Vinh Dang; Ted Xie; Dan Kramp; Westley Weimer; Mircea Stan; Kevin Skadron (IEEE Comput. Archit. Lett., 2018)

Hardware based Spatio-Temporal Neural Processing Backend for Imaging Sensors: Towards a Smart Camera. - Samiran Ganguly; Yunfei Gu; Mircea R. Stan; Avik W. Ghosh (CoRR, 2018)

Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). - Eric Cheng; Shahrzad Mirkhani; Lukasz G. Szafaryn; Chen-Yong Cher; Hyungmin Cho; Kevin Skadron; Mircea R. Stan; Klas Lilja; Jacob A. Abraham; Pradip Bose; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Controlling the Reliability of SRAM PUFs With Directed NBTI Aging and Recovery. - Alec Roelke; Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Asynchronous Stochastic Computing. - Patricia Gonzalez-Guerrero; Mircea R. Stan (ACSSC, 2019)

Fourier-based Error Analysis for Computing with Asynchronous Sigma-Delta Streams. - Stephen G. Wilson; Patricia Gonzalez-Guerrero; Mircea Stan (ACSSC, 2019)

Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. - Eric Cheng; Daniel Mueller-Gritschneder; Jacob A. Abraham; Pradip Bose; Alper Buyuktosunoglu; Deming Chen; Hyungmin Cho; Yanjing Li; Uzair Sharif; Kevin Skadron; Mircea Stan; Ulf Schlichtmann; et al. (DAC, 2019)

Flexi-AES: A Highly-Parameterizable Cipher for a Wide Range of Design Constraints. - Sergiu Mosanu; Xinfei Guo; Mohamed El-Hadedy 001; Lorena Anghel; Mircea Stan (FCCM, 2019)

Towards low-power random forest using asynchronous computing with streams. - Patricia Gonzalez-Guerrero; Tommy Tracy II; Xinfei Guo; Mircea R. Stan (IGSC, 2019)

An Overflow-free Quantized Memory Hierarchy in General-purpose Processors. - Marzieh Lenjani; Patricia Gonzalez-Guerrero; Elaheh Sadredini; M. Arif Imtiazur Rahman; Mircea R. Stan (IISWC, 2019)

ASC-FFT: Area-Efficient Low-Latency FFT Design Based on Asynchronous Stochastic Computing. - Patricia Gonzalez-Guerrero; Xinfei Guo; Mircea R. Stan (LASCAS, 2019)

eAP: A Scalable and Efficient In-Memory Accelerator for Automata Processing. - Elaheh Sadredini; Reza Rahimi; Vaibhav Verma; Mircea Stan; Kevin Skadron (MICRO, 2019)

Asynchronous Stream Computing for Low Power IoT. - Patricia Gonzalez-Guerrero; Mircea R. Stan (MWSCAS, 2019)

Error-latency Trade-off for Asynchronous Stochastic Computing with ΣΔ Streams for the IoT. - Patricia Gonzalez-Guerrero; Stephen G. Wilson; Mircea R. Stan (SoCC, 2019)

A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing. - Elaheh Sadredini; Reza Rahimi; Vaibhav Verma; Mircea Stan; Kevin Skadron (IEEE Comput. Archit. Lett., 2019)

Automata Processing in Reconfigurable Architectures: In-the-Cloud Deployment, Cross-Platform Evaluation, and Fast Symbol-Only Reconfiguration. - Chunkun Bo; Vinh Dang; Ted Xie; Jack Wadden; Mircea Stan; Kevin Skadron (ACM Trans. Reconfigurable Technol. Syst., 2019)

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. - Massimo Alioto; Magdy S. Abadir; Tughrul Arslan; Chirn Chye Boon; Andreas Burg 001; Chip-Hong Chang; Meng-Fan Chang; Yao-Wen Chang; Poki Chen; Pasquale Corsonello; Paolo Crovetti; Shiro Dosho; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2019)

MTTF Enhancement Power-C4 Bump Placement Optimization. - Somayeh Rahimipour; Runjie Zhang; Ke Wang 011; Kevin Skadron; Fakhrul Zaman Rokhani; Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2019)

FlexAmata: A Universal and Efficient Adaption of Applications to Spatial Automata Processing Accelerators. - Elaheh Sadredini; Reza Rahimi; Marzieh Lenjani; Mircea Stan; Kevin Skadron (ASPLOS, 2020)

Nano-Crossbar based Computing: Lessons Learned and Future Directions. - Mustafa Altun; Ismail Cevik; Ahmet Can Erten; Osman Eksik; Mircea Stan; Csaba Andras Moritz (DATE, 2020)

Grapefruit: An Open-Source, Full-Stack, and Customizable Automata Processing on FPGAs. - Reza Rahimi; Elaheh Sadredini; Mircea Stan; Kevin Skadron (FCCM, 2020)

Fulcrum: A Simplified Control and Access Mechanism Toward Flexible and Practical In-Situ Accelerators. - Marzieh Lenjani; Patricia Gonzalez-Guerrero; Elaheh Sadredini; Shuangchen Li; Yuan Xie 001; Ameen Akel; Sean Eilert; Mircea R. Stan; Kevin Skadron (HPCA, 2020)

Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching. - Elaheh Sadredini; Reza Rahimi; Marzieh Lenjani; Mircea Stan; Kevin Skadron (HPCA, 2020)

Memristive Learning Cellular Automata: Theory and Applications. - Rafailia-Eleni Karamani; Iosif-Angelos Fyrigos; Vasileios G. Ntinas; Orestis Liolis; Giorgos Dimitrakopoulos; Mustafa Altun; Andrew Adamatzky; Mircea R. Stan; Georgios Ch. Sirakoulis (MOCAST, 2020)

VLSI for Next Generation CE. - Nikolaos S. Voros; Mircea Stan; Michael Hübner 001; Georgios Keramidas (IEEE Consumer Electron. Mag., 2020)

Temporal Memory with Magnetic Racetracks. - Hamed Vakili; Mohammad Nazmus Sakib; Samiran Ganguly; Mircea Stan; Matthew W. Daniels; Advait Madhavan; Mark D. Stiles; Avik W. Ghosh (CoRR, 2020)

Towards on-node Machine Learning for Ultra-low-power Sensors Using Asynchronous Σ Δ Streams. - Patricia Gonzalez-Guerrero; Tommy Tracy II; Xinfei Guo; Rahul Sreekumar; Marzieh Lenjani; Kevin Skadron; Mircea R. Stan (ACM J. Emerg. Technol. Comput. Syst., 2020)

Low-Power, Highly Reliable Dynamic Thermal Management by Exploiting Approximate Computing. - Somayeh Rahimipour; Wameedh Nazar Flayyih; Noor Ain Kamsani; Shaiful Jahari Hashim; Mircea R. Stan; Fakhrul Zaman Rokhani (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Microarchitecture Optimization for Asynchronous Stochastic Computing. - Rahul Sreekumar; Mircea R. Stan (ICECS, 2021)

Power and Thermal Modeling of In-3D-Memory Computing. - Jun-Han Han; Robert E. West; Karina Torres-Castro; Nathan Swami; Samira Manabi Khan; Mircea Stan (ISDCS, 2021)

ATCPiM: Analog to Time Coded Processing in Memory for IoT at the Edge. - Mohammad Nazmus Sakib; Rahul Sreekumar; Vaibhav Verma; Tommy Tracy II; Mircea R. Stan (WF-IoT, 2021)

PiMulator: a Fast and Flexible Processing-in-Memory Emulation Platform. - Sergiu Mosanu; Mohammad Nazmus Sakib; Tommy Tracy II; Ersin Cukurtas; Alif Ahmed; Preslav Ivanov; Samira Manabi Khan; Kevin Skadron; Mircea Stan (DATE, 2022)

Gearbox: a case for supporting accumulation dispatching and hybrid partitioning in PIM-based accelerators. - Marzieh Lenjani; Alif Ahmed; Mircea Stan; Kevin Skadron (ISCA, 2022)

Towards Everlasting Flash: Preventing Permanent Flash Cell Damage using Circadian Rhythms. - Muhammed Ceylan Morgül; Xinfei Guo; Mircea Stan (ISVLSI, 2022)

Processing-in-Memory with Temporal Encoding. - Mohammad Nazmus Sakib; Rahul Sreekumar; Xinyuan Zhu; Tommy Tracy II; Mircea R. Stan (ISVLSI, 2022)

ISKEVA: in-SSD key-value database engine for video analytics applications. - Yi Zheng; Joshua Fixelle; Nagadastagiri Challapalle; Pingyi Huo; Zhaoyan Shen; Zili Shao; Mircea Stan; Vijaykrishnan Narayanan (LCTES, 2022)

Scheduling Active and Accelerated Recovery to Combat Aging in Integrated Circuits. - Muhammed Ceylan Morgül; Mircea R. Stan; Xinfei Guo (MWSCAS, 2022)

Agile-AES: Implementation of configurable AES primitive with agile design approach. - Xinfei Guo; Mohamed El-Hadedy 001; Sergiu Mosanu; Xiangdong Wei; Kevin Skadron; Mircea R. Stan (Integr., 2022)

EXTREM-EDGE - EXtensions To RISC-V for Energy-efficient ML inference at the EDGE of IoT. - Vaibhav Verma; Tommy Tracy II; Mircea R. Stan (Sustain. Comput. Informatics Syst., 2022)

Thermal Performance Analysis of Mempool RISC-V Multicore SoC. - Sankatali Venkateswarlu; Subrat Mishra; Herman Oprins; Bjorn Vermeersch; Moritz Brunion; Jun-Han Han; Mircea R. Stan; Pieter Weckx; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Hardware Trojans in eNVM Neuromorphic Devices. - Lingxi Wu; Rahul Sreekumar; Rasool Sharifi; Kevin Skadron; Mircea R. Stan; Ashish Venkat (DATE, 2023)

FreezeTime: Towards System Emulation through Architectural Virtualization. - Sergiu Mosanu; Joshua Fixelle; Kevin Skadron; Mircea Stan (FPGA, 2023)

Design Space Exploration of Layer-Wise Mixed-Precision Quantization with Tightly Integrated Edge Inference Units. - Xiaotian Zhao; Yimin Gao; Vaibhav Verma; Ruge Xu; Mircea Stan; Xinfei Guo (ACM Great Lakes Symposium on VLSI, 2023)

Hot-LEGO: Architect Microfluidic Cooling Equipped 3DIC with Pre-RTL Thermal Simulation. - Runxi Wang; Jun-Han Han; Mircea Stan; Xinfei Guo (IGSC, 2023)

FreezeTime: Towards System Emulation through Architectural Virtualization. - Sergiu Mosanu; Joshua Fixelle; Mohammad Nazmus Sakib; Kevin Skadron; Mircea Stan (IPDPS Workshops, 2023)

A Low Power SRAM with Fully Dynamic Leakage Suppression for IoT Nodes. - Jun Yin; Mircea R. Stan (ISQED, 2023)

ISVABI: In-Storage Video Analytics Engine with Block Interface. - Yi Zheng; Joshua Fixelle; Pingyi Huo; Mircea Stan; Michael P. Mesnier; Vijaykrishnan Narayanan (LCTES, 2023)

Virtualized Controller for Computational RFID-based IoT Sensors. - Elisa Pantoja; Rahul Sreekumar; Sergiu Mosanu; Tommy Tracy II; Mircea Stan (RFID, 2023)

LiteAIR5: A System-Level Framework for the Design and Modeling of AI-extended RISC-V Cores. - Yimin Gao; Sergiu Mosanu; Mohammad Nazmus Sakib; Vaibhav Verma; Xinfei Guo; Mircea Stan (SOCC, 2023)

Advancing Wireless IoT Sensor Networks With Edge-Powered RFID Devices. - Elisa Pantoja; Mircea Stan (UEMCON, 2023)

Editorial New Beginnings for IEEE TVLSI. - Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Editorial Rolling Out the IEEE TVLSI EDICS. - Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC. - Sankatali Venkateswarlu; Subrat Mishra; Herman Oprins; Bjorn Vermeersch; Moritz Brunion; Jun-Han Han; Mircea R. Stan; Dwaipayan Biswas; Pieter Weckx; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Double magnetic tunnel junction based ∑Δ∑ hardware neuron. - Faiyaz E. Mullick; Rahul Sreekumar; Md Golam Morshed; Samiran Ganguly; Mircea Stan; Avik W. Ghosh (DRC, 2024)

A Feedback Self-adaptive Body Biasing-based RF-DC Rectifier for Highly-sensitive RF Energy Harvesting. - Jun Yin; Elisa Pantoja; Yimin Gao; Mircea R. Stan (ISCAS, 2024)

EASI-CiM: Event-driven Asynchronous Stream-based Image classifier with Compute-in-Memory kernels. - Rahul Sreekumar; Minseong Park; Mohammad Nazmus Sakib; Bhupendra S. Reniwal; Kyusang Lee; Mircea R. Stan (ISQED, 2024)

Unveiling Proactive Recovery's Preventative Impact on NAND Flash Wearout. - Muhammed Ceylan Morgül; Xinfei Guo; Mircea Stan (ISVLSI, 2024)

Exploring Noise- Resilient Spiking Neural Encoding using ∑†∑ Neurons. - Rahul Sreekumar; Faiyaz E. Mullick; Md Golam Morshed; Avik W. Ghosh; Mircea R. Stan (MWSCAS, 2024)

CryptoPUF: A Lightweight and ML-Resilient Strong PUF Based on a Weak PUF and Crypto Core. - Yimin Gao; John Chilaka; Elisa Pantoja; Robert Klenke; Mircea Stan (RFID-TA, 2024)

Hot-LEGO: Architect Microfluidic Cooling Equipped 3DICs with Pre-RTL Thermal Simulation. - Runxi Wang; Jun-Han Han; Mircea Stan; Xinfei Guo (CoRR, 2024)

Unlocking High-Performance Low-Power Adiabatic Logic Computing with Modern FinFET Technology Node. - Jun Yin; Mircea Stan (ACM Great Lakes Symposium on VLSI, 2025)

EAS-CiM 2.0: Event-driven Asynchronous Stream-based Compute-in-Memory Kernels with Scalable Precision. - Rahul Sreekumar; M. Morsali; Naomi Solomon; Yimin Gao; Minseong Park; Kyusang Lee; R. K. Krishnamurthy; Mircea R. Stan (ISCAS, 2025)

Design and Modeling for Very High-sensitivity UHF RF Energy Harvesting Circuit. - Jun Yin; Mircea R. Stan (LASCAS, 2025)

Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs. - Runxi Wang; Ziheng Wang; Ting Lin; Jacob M. Raby; Mircea R. Stan; Xinfei Guo (CoRR, 2025)

Editorial: Renewed Excellence for 2025-2026. - Mircea R. Stan (IEEE Trans. Very Large Scale Integr. Syst., 2025)

CLEAR Cross-Layer Resilience: A Retrospective. - Eric Cheng; Hyungmin Cho; Shahrzad Mirkhani; Lukasz G. Szafaryn; Jacob A. Abraham; Pradip Bose; Chen-Yong Cher; Klas Lilja; Kevin Skadron; Mircea Stan; Subhasish Mitra (IEEE Des. Test, 2025)