Enhancing a control graph based HDL for performance evaluation of simulated architectures. - Ryszard F. Gajda; Miroslaw Thor; Marek S. Tudruj (Microprocessing and Microprogramming, 1990)

The Architecture of a Multilayer Dynamically Reconfigurable Transputer System. - Marek S. Tudruj; Miroslaw Thor (ICPP (1), 1991)

HP-MODTRANS: A High performance modular transputer architecture. - Miroslaw Thor; Tomasz Kalinowski (Microprocess. Microprogramming, 1993)

HP-FLEXAR: A reconfigurable multi-unit heterogeneous topology architecture for time critical applications. - Miroslaw Thor (Microprocess. Microprogramming, 1994)

Multi-Processor, Reconfigurable Architecture Increasing Perfomance of Distributed Object-Oriented Programs. - Miroslaw Thor (Parcella, 1996)

A multi-thread approach reducing program execution time in a heterogeneous reconfigurable multi-processor architecture. - Miroslaw Thor (J. Syst. Archit., 1997)

Program Execution Control in a Multi CMP Module System with a Look-Ahead Configured Global Network. - Eryk Laskowski; Lukasz Masko; Marek S. Tudruj; Miroslaw Thor (ISPDC, 2009)

Globally-Interconnected Modular CMP Systems with Communication on the Fly. - Marek S. Tudruj; Lukasz Masko; Miroslaw Thor (PDPTA, 2009)

Preface. - Miroslaw Thor; Marek S. Tudruj (J. Supercomput., 2011)

Multi-CMP system with data communication on the fly. - Marek S. Tudruj; Lukasz Masko; Miroslaw Thor (J. Supercomput., 2011)