2-Level Miller Detection-Based High Side Gate Driver Design for Power MOSFETs. - Oliver Lexter July A. Jose; Venkata Naveen Kolakaluri; Jui-Min Kuo; Mitch Ming-Chi Chou; Chua-Chin Wang (APCCAS, 2023)

Active Gate Driver Design Using Differential Timing-based Miller Detector for Power MOSFET. - Pradyumna Vellanki; Venkata Naveen Kolakaluri; Yun-Che Chang; L. S. S. Pavan Kumar Chodisetti; Mitch Ming-Chi Chou; Chua-Chin Wang (APCCAS, 2024)

A 10-MHz 5-V On-chip 6-layer Multi-level Digital Transformer Using T18HVG2 Process. - Oliver Lexter July A. Jose; Yun-Che Chang; Venkata Naveen Kolakaluri; Celso B. Co; Mitch Ming-Chi Chou; Chua-Chin Wang (ISCAS, 2024)

A Multi-Level Power Gating Logic Controlled Driver for A 10-V Power Transistor Using 180-nm High Voltage BCD Process. - Soumika Majumder; Lean Karlo Santos Tolentino; Oliver Lexter July Alvarez Jose; Venkata Naveen Kolakaluri; Mitch Ming-Chi Chou; Chua-Chin Wang (ISOCC, 2024)