LSI module placement methods using neural computation networks. - Hiroshi Date; Mitsuho Seki; Terumine Hayashi (IJCNN, 1990)

Timing-Oriented Routers for PCB Layout Design of High-Performance Computers. - Yutaka Sekiyama; Yasuyuki Fujihara; Terumine Hayashi; Mitsuho Seki; Jiro Kusuhara; Kazuhiko Iijima; Masahiro Takakura; Koji Fukatani (ICCAD, 1991)

A New Floorplan Simultaneously Placing Blocks over Two Logic Layers for Sea-of-gate Gate Arrays. - Mitsuho Seki; Shun'ichi Kobayashi; Munehiro Takubo; Kazuyoshi Kurosawa (ISCAS, 1993)

A specified delay accomplishing clock router using multiple layers. - Mitsuho Seki; Kenji Inoue; Kazuo Kato; Kouki Tsurusaki; Shin'ichi Fukasawa; Hitoshi Sasaki; Mutsuhito Aizawa (ICCAD, 1994)

A practical clock router that accounts for the capacitance derived from parallel and cross segments. - Mitsuho Seki; Kazuo Kato; S. Kobayashi; Kouki Tsurusaki (EURO-DAC, 1996)

Design Methodology of a 200MHz Superscalar Microprocessor: SH-4. - Toshihiro Hattori; Yusuke Nitta; Mitsuho Seki; Susumu Narita; Kunio Uchiyama; Tsuyoshi Takahashi; Ryuichi Satomura (DAC, 1998)