An 8 ns 256 K BiCMOS RAM. - Nobuo Tamba; Shuuichi Miyaoka; Masanori Odaka; Katsumi Ogiue; Kouichirou Yamada; Takahide Ikeda; Mitsuru Hirao; Hisayuki Higuchi; Hideaki Uchida (IEEE J. Solid State Circuits, 1989)

Quasi-complementary BiCMOS for sub-3-V digital circuits. - Kazuo Yano; Mitsuru Hiraki; Shoji Shukuri; Yasuo Onose; Mitsuru Hirao; Nagatoshi Ohki; Takashi Nishida; Koichi Seki; Katsuhiro Shimohigashi (IEEE J. Solid State Circuits, 1991)